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Fix printf verb %s of wrong type #827

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merged 1 commit into from
Sep 24, 2017
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sakeven
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@sakeven sakeven commented Sep 23, 2017

Description

%#v is more readable than %s.

%s generate error like:

&{{%!s(int=0) %!s(int=0) %!s(int=0)   0 %!s(uint32=0) %!s(int=0) %!s(int=0) <nil>  %!s(*netlink.LinkStatistics=<nil>) %!s(int=0) %!s(*netlink.LinkXdp=<nil>)  <nil> unknown} %!s(int=0) %!s(int=0) <nil> <nil> %!s(int=0) %!s(int=0) %!s(bool=false) %!s(bool=false) %!s(bool=false) %!s(bool=false) %!s(bool=false) %!s(bool=false) %!s(bool=false) %!s(bool=false) %!s(int=0) %!s(int=0) %!s(int=0) %!s(int=0) %!s(int=0)}

while %#v:

&netlink.Vxlan{LinkAttrs:netlink.LinkAttrs{Index:0, MTU:0, TxQLen:0, Name:"", HardwareAddr:net.HardwareAddr(nil), Flags:0x0, RawFlags:0x0, ParentIndex:0, MasterIndex:0, Namespace:interface {}(nil), Alias:"", Statistics:(*netlink.LinkStatistics)(nil), Promisc:0, Xdp:(*netlink.LinkXdp)(nil), EncapType:"", Protinfo:(*netlink.Protinfo)(nil), OperState:0x0}, VxlanId:0, VtepDevIndex:0, SrcAddr:net.IP(nil), Group:net.IP(nil), TTL:0, TOS:0, Learning:false, Proxy:false, RSC:false, L2miss:false, L3miss:false, UDPCSum:false, NoAge:false, GBP:false, Age:0, Limit:0, Port:0, PortLow:0, PortHigh:0}

@gunjan5
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gunjan5 commented Sep 24, 2017

Thanks, @sakeven for your contribution!

@gunjan5 gunjan5 merged commit 8cb9274 into flannel-io:master Sep 24, 2017
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2 participants