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Stable, Dev and missing dependencies #4
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I'll need to fix this project, the problem is that the clock_gen has to be 2015-01-20 15:13 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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sticking with fpga-logi, the attached all look clock related, ~:" Line 244: Formal port/generic <b_burst_size> is not declared in <wishbone_fifo> ERROR:HDLCompiler:XXXX - ".../logi-projects/logi-camera-test/hw/logipi/hdl/logi_camera_test.vhd" Line 262: Formal port/generic is not declared in <wishbone_fifo> |
Jonathan, please can you advise on further progress? thanks again |
Just made the changes. Can you try to synthesize on your side ? You'll need 2015-01-23 8:48 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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okay, apologies, but bogged down in a morass just now... will try today or else over weekend |
Don't hesistate to report more bugs. There was some changes in logi-hard 2015-01-23 11:02 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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Jonathan, is logi-camera-test the best place to start? regarding the original issue as described: I tried to synthesise logi-camera-test: only reference to yuv_to_fifo.vhd on Google: image_pack.vhd component yuv_to_fifo is appreciate your patience. |
I just pushed the file on the git again. Can you update hard-cv and see if What is your experience with VHDL ? 2015-01-23 13:17 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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I tried what I believe was a fully up to date build of logi-camera-demo[1] please advise [1]https://github.com/fpga-logi/logi-projects/blob/master/logi-camera-demo/hw/logipi/ise/logipi-hw.xise |
can you try again just comitted the changes 2015-02-08 19:49 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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I updated and tried again, same result. please read previous comment: Line 138 of /logipi-hw.xise in logi-camera-demo requires yuv_pixel2fifo.vhd which is not present in hard-cv. it may be there is also an issue with clocks, but cannot confirm until this is fixed. |
It should be fine now. Everything was fine but i forgot to commit the 2015-02-09 8:45 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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You are ritgh, the clock will also create a problem as it requires the user 2015-02-09 8:56 GMT+01:00 Jonathan Piat piat.jonathan@gmail.com:
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yup will need plenty of patience from both of us... i'm working on other logi-projects, but one at a time as it were... many thanks ~:" From: Piat Jonathan notifications@github.com It should be fine now. Everything was fine but i forgot to commit the 2015-02-09 8:45 GMT+01:00 Jonathan Chetwynd notifications@github.com:
Reply to this email directly or view it on GitHubhttps://github.com//issues/4#issuecomment-73469659. |
Sure, problem is that we have multi-component that evolve over time but its 2015-02-09 8:59 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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fixed the missing clock_gen issue 2015-02-09 9:02 GMT+01:00 Jonathan Piat piat.jonathan@gmail.com:
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will build, I'm sure we will want/need to create dev/stable versions fairly soon. else we'll be chasing our tails. ~:" From: Piat Jonathan notifications@github.com fixed the missing clock_gen issue 2015-02-09 9:02 GMT+01:00 Jonathan Piat piat.jonathan@gmail.com:
Reply to this email directly or view it on GitHubhttps://github.com//issues/4#issuecomment-73470949. |
which are the new files? cannot find changes to hard-cv or logi-camera-demo ~:" From: Piat Jonathan notifications@github.com fixed the missing clock_gen issue 2015-02-09 9:02 GMT+01:00 Jonathan Piat piat.jonathan@gmail.com:
Reply to this email directly or view it on GitHubhttps://github.com//issues/4#issuecomment-73470949. |
There was a change in logipi_camera_demo.vhd 2015-02-09 9:19 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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did you commit? https://github.com/peepo/logi-projects shows update 9 months ago ~:" ~ [https://avatars3.githubusercontent.com/u/260305?v=3&s=400]https://github.com/peepo/logi-projects peepo/logi-projects · GitHub peepo/logi-projects · GitHub Remove preview From: Piat Jonathan notifications@github.com There was a change in logipi_camera_demo.vhd 2015-02-09 9:19 GMT+01:00 Jonathan Chetwynd notifications@github.com:
Reply to this email directly or view it on GitHubhttps://github.com//issues/4#issuecomment-73472158. |
show 21 minutes ago in logi-projects (not your fork). https://github.com/fpga-logi/Logi-projects 2015-02-09 9:26 GMT+01:00 Jonathan Chetwynd notifications@github.com:
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oops! tx From: Piat Jonathan notifications@github.com show 21 minutes ago in logi-projects (not your fork). https://github.com/fpga-logi/Logi-projects 2015-02-09 9:26 GMT+01:00 Jonathan Chetwynd notifications@github.com:
Reply to this email directly or view it on GitHubhttps://github.com//issues/4#issuecomment-73472966. |
Jonathan,
please accept my apologies if I have misconstrued how to build these projects.
I'm only just starting and they are quite large, at least for me....
It's a little difficult for me to give sufficient but not superfluous detail, please bear with me.
I am happy to contribute to either fpga-logi or fpga-logi-dev, but both might fry my brains.
please advise...
I am trying to synthesise logi_camera_test.xise,
though I may work through all the projects,
but camera & hardCV is my concern.
using fpga-logi-dev:
logi-hard is missing directory wishbone and contents, nb clock_gen is present vv
see: https://github.com/fpga-logi-dev/logi-hard
using fpga-logi:
directory logi-projects/logi-camera-test/hw/logipi/ise/ipcore_dir/clock_gen is missing
see: https://github.com/fpga-logi/logi-projects/tree/master/logi-camera-test/hw/logipi/ise/ipcore_dir
please advise what would be the most efficient approach.
I am keen to minimise both confusion, and the number of pull requests.
many thanks once again,
~:"
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