major update to vc709 example project

fpgasystems · Jun 25, 2018 · 004eddf · 004eddf
1 parent 6b7c2b0
commit 004eddf
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Showing 4 changed files with 1,081 additions and 2,102 deletions.
diff --git a/constraints/vc709.xdc b/constraints/vc709.xdc
@@ -30,10 +30,10 @@ set_property IOSTANDARD LVCMOS18 [get_ports button_west]
 
 set_property PACKAGE_PIN AR40 [get_ports button_north]
 set_property IOSTANDARD LVCMOS18 [get_ports button_north]
-#set_property PACKAGE_PIN AP40 [get_ports button_south]
-#set_property IOSTANDARD LVCMOS18 [get_ports button_south]
-#set_property PACKAGE_PIN AV39 [get_ports button_center]
-#set_property IOSTANDARD LVCMOS18 [get_ports button_center]
+set_property PACKAGE_PIN AP40 [get_ports button_south]
+set_property IOSTANDARD LVCMOS18 [get_ports button_south]
+set_property PACKAGE_PIN AV39 [get_ports button_center]
+set_property IOSTANDARD LVCMOS18 [get_ports button_center]
 
 
 #UART