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fix(doc): update broken links
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raised by CI.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
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fpistm committed Nov 23, 2023
1 parent 61a41ec commit b2b9c8c
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Expand Up @@ -298,7 +298,7 @@ And then the Device Tree should enable TIM1 for the coprocessor, although this d
[STM32MP157A-DK1]: https://www.st.com/en/evaluation-tools/stm32mp157a-dk1.html
[STM32MP157C-DK2]: https://www.st.com/en/evaluation-tools/stm32mp157c-dk2.html

[Cortex-M4 Engineering mode]: https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_development_guidelines
[Cortex-M4 Engineering mode]: https://wiki.st.com/stm32mpu/wiki/How_to_use_engineering_and_production_modes
[STM32MP15 Starter Package]: https://wiki.st.com/stm32mpu/wiki/STM32MP15_Discovery_kits_-_Starter_Package
[STM32 MPU OpenSTLinux Distribution]: https://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_Package
[Balena OS]: https://github.com/kbumsik/balena-st-stm32mp
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Expand Up @@ -126,7 +126,7 @@ void SystemClock_Config(void)
* * Production mode: Both CA7 and CM4 core running, BOOT0 and BOOT2 are ON.
* * Engineering mode: Only CM4 running, BOOT0 = OFF, BOOT2 = ON.
* See:
* https://wiki.st.com/stm32mpu/wiki/STM32CubeMP1_development_guidelines
* https://wiki.st.com/stm32mpu/wiki/How_to_use_engineering_and_production_modes
*/
if (!IS_ENGINEERING_BOOT_MODE()) {
return;
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