Skip to content

Commit

Permalink
Merge 865bfc3 into 859de37
Browse files Browse the repository at this point in the history
  • Loading branch information
snim2 committed Sep 19, 2016
2 parents 859de37 + 865bfc3 commit 2c4c7ec
Show file tree
Hide file tree
Showing 5 changed files with 10 additions and 10 deletions.
2 changes: 1 addition & 1 deletion benchmarks/single-core/richards_quick.c
Original file line number Diff line number Diff line change
Expand Up @@ -375,7 +375,7 @@ void append(struct packet *pkt, struct packet *ptr)

int main(void)
{
int reps = 25; /* FIXME: 500 */
int reps = 2; /* FIXME: 500 */
struct packet *wkq = 0;
struct task *tasks[NUM_TASKS];
struct packet *pkts[NUM_PKTS];
Expand Down
Binary file modified benchmarks/single-core/richards_quick.elf
Binary file not shown.
4 changes: 2 additions & 2 deletions revelation/machine.py
Original file line number Diff line number Diff line change
Expand Up @@ -61,15 +61,15 @@ def set_first_core(self, value):

@property
def pc(self):
return self.mem.iread(LOCAL_PC_ADDRESS, 4, from_core=self.coreid)
return self.mem.read(LOCAL_PC_ADDRESS, 4, from_core=self.coreid)

@pc.setter
def pc(self, value):
return self.mem.write(LOCAL_PC_ADDRESS, 4, value, from_core=self.coreid)

def fetch_pc(self):
# Override method from base class. Needed by Pydgin.
return self.mem.iread(LOCAL_PC_ADDRESS, 4, from_core=self.coreid)
return self.mem.read(LOCAL_PC_ADDRESS, 4, from_core=self.coreid)

def get_pending_interrupt(self):
ipend_highest_bit = -1
Expand Down
2 changes: 1 addition & 1 deletion revelation/sim.py
Original file line number Diff line number Diff line change
Expand Up @@ -136,7 +136,7 @@ def run(self):
sim=self,
state=state,)
# Fetch next instruction.
opcode = state.mem.iread(pc, 4, from_core=state.coreid)
opcode = state.mem.idempotent_read(pc, 4, from_core=state.coreid)
try:
# Decode instruction.
mnemonic, function = decode(opcode)
Expand Down
12 changes: 6 additions & 6 deletions revelation/storage.py
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ def read(self, start_addr, num_bytes):
value = value | ord(self.data[start_addr + i])
return value

def iread(self, start_addr, num_bytes):
def idempotent_read(self, start_addr, num_bytes):
"""This is instruction read, which is otherwise identical to read. The
only difference is the elidable annotation, which we assume the
instructions are not modified (no side effects, assumes the addresses
Expand Down Expand Up @@ -70,7 +70,7 @@ def get_block_mem(self, block_addr):
block_mem = self.block_dict[block_addr]
return block_mem

def iread(self, start_addr, num_bytes, from_core=0x808):
def idempotent_read(self, start_addr, num_bytes, from_core=0x808):
if is_local_address(start_addr):
start_addr |= (from_core << 20)
end_addr = start_addr + num_bytes - 1
Expand All @@ -82,15 +82,15 @@ def iread(self, start_addr, num_bytes, from_core=0x808):
# for it.
block_end_addr = self.block_mask & end_addr
if block_addr == block_end_addr:
value = block_mem.iread(start_addr & self.addr_mask, num_bytes)
value = block_mem.idempotent_read(start_addr & self.addr_mask, num_bytes)
else:
num_bytes1 = min(self.block_size - (start_addr & self.addr_mask),
num_bytes)
num_bytes2 = num_bytes - num_bytes1
block_mem1 = block_mem
block_mem2 = self.get_block_mem(block_end_addr)
value1 = block_mem1.iread(start_addr & self.addr_mask, num_bytes1)
value2 = block_mem2.iread(0, num_bytes2)
value1 = block_mem1.idempotent_read(start_addr & self.addr_mask, num_bytes1)
value2 = block_mem2.idempotent_read(0, num_bytes2)
value = value1 | (value2 << (num_bytes1 * 8))
return value

Expand Down Expand Up @@ -175,7 +175,7 @@ def __init__(self, memory, coreid, logger):
def __getitem__(self, index):
address, bitsize, _ = reg_memory_map[index]
mask = (1 << bitsize) - 1
value = self.memory.iread(address, 4, from_core=self.coreid) & mask
value = self.memory.read(address, 4, from_core=self.coreid) & mask
if (self.debug.enabled('rf') and self.logger and index < 64 and
self.is_first_core):
self.logger.log(' :: RD.RF[%s] = %s' % (pad('%d' % index, 2),
Expand Down

0 comments on commit 2c4c7ec

Please sign in to comment.