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RISC-V: Fix attributes bug configuration of ternary instructions
This patch fixes the following FAILs: Running target riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-preference=fixed-vlmax FAIL: gcc.c-torture/execute/pr68532.c -O0 execution test FAIL: gcc.c-torture/execute/pr68532.c -O1 execution test FAIL: gcc.c-torture/execute/pr68532.c -O2 execution test FAIL: gcc.c-torture/execute/pr68532.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions execution test FAIL: gcc.c-torture/execute/pr68532.c -O3 -g execution test FAIL: gcc.c-torture/execute/pr68532.c -Os execution test FAIL: gcc.c-torture/execute/pr68532.c -O2 -flto -fno-use-linker-plugin -flto-partition=none execution test Running target riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-lmul=m2/--param=riscv-autovec-preference=fixed-vlmax FAIL: gcc.dg/vect/pr60196-1.c execution test FAIL: gcc.dg/vect/pr60196-1.c -flto -ffat-lto-objects execution test Running target riscv-sim/-march=rv64gcv/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-preference=fixed-vlmax FAIL: gcc.dg/vect/pr60196-1.c execution test FAIL: gcc.dg/vect/pr60196-1.c -flto -ffat-lto-objects execution test Running target riscv-sim/-march=rv64gcv_zvl256b/-mabi=lp64d/-mcmodel=medlow/--param=riscv-autovec-preference=fixed-vlmax FAIL: gcc.dg/vect/pr60196-1.c execution test FAIL: gcc.dg/vect/pr60196-1.c -flto -ffat-lto-objects execution test The root cause is attributes of ternary intructions are incorrect which cause AVL prop PASS and VSETVL PASS behave incorrectly. Tested no regression and committed. PR target/113393 gcc/ChangeLog: * config/riscv/vector.md: Fix ternary attributes. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr113393-1.c: New test. * gcc.target/riscv/rvv/autovec/pr113393-2.c: New test. * gcc.target/riscv/rvv/autovec/pr113393-3.c: New test.
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,24 @@ | ||
/* { dg-do run } */ | ||
/* { dg-options "-O3 --param=riscv-autovec-preference=fixed-vlmax" } */ | ||
/* { dg-require-effective-target riscv_v } */ | ||
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#define SIZE 128 | ||
unsigned short _Alignas (16) in[SIZE]; | ||
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__attribute__ ((noinline)) int | ||
test (unsigned short sum, unsigned short *in, int x) | ||
{ | ||
for (int j = 0; j < SIZE; j += 8) | ||
sum += in[j] * x; | ||
return sum; | ||
} | ||
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int | ||
main () | ||
{ | ||
for (int i = 0; i < SIZE; i++) | ||
in[i] = i; | ||
if (test (0, in, 1) != 960) | ||
__builtin_abort (); | ||
return 0; | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,29 @@ | ||
/* { dg-do run } */ | ||
/* { dg-options "-O3 --param=riscv-autovec-preference=fixed-vlmax --param=riscv-autovec-lmul=m2" } */ | ||
/* { dg-require-effective-target riscv_v } */ | ||
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__attribute__((noinline, noclone)) static int | ||
bar (const short *a, int len) | ||
{ | ||
int x; | ||
int x1 = 0; | ||
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for (x = 0; x < len; x++) | ||
x1 += x * a[x]; | ||
return x1; | ||
} | ||
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__attribute__((noinline, noclone)) void | ||
foo (void) | ||
{ | ||
short stuff[9] = {1, 1, 1, 1, 1, 1, 1, 1, 1 }; | ||
if (bar (stuff, 9) != 36) | ||
__builtin_abort (); | ||
} | ||
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int | ||
main () | ||
{ | ||
foo (); | ||
return 0; | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,5 @@ | ||
/* { dg-do run } */ | ||
/* { dg-options "-O3 --param=riscv-autovec-preference=fixed-vlmax" } */ | ||
/* { dg-require-effective-target riscv_v } */ | ||
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#include "pr113393-2.c" |