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RISC-V: Implement instruction patterns for ZBS extension.
2021-10-25 Jim Wilson <jimw@sifive.com> Kito Cheng <kito.cheng@sifive.com> gcc/ChangeLog: * config/riscv/bitmanip.md (shiftm1): New. (*bset<mode>): Ditto. (*bset<mode>_mask): Ditto. (*bset<mode>_1): Ditto. (*bset<mode>_1_mask): Ditto. (*bseti<mode>): Ditto. (*bclr<mode>): Ditto. (*bclri<mode>): Ditto. (*binv<mode>): Ditto. (*binvi<mode>): Ditto. (*bext<mode>): Ditto. (*bexti): Ditto. * config/riscv/predicates.md (splittable_const_int_operand): Handle bseti. (single_bit_mask_operand): New. (not_single_bit_mask_operand): Ditto. (const31_operand): Ditto. (const63_operand): Ditto. * config/riscv/riscv.c (riscv_build_integer_1): Handle bseti. (riscv_output_move): Ditto. (riscv_print_operand): Handle new operand type: T and S. * config/riscv/riscv.h (SINGLE_BIT_MASK_OPERAND): New. 2021-10-25 Jia-Wei Chen <jiawei@iscas.ac.cn> Shi-Hua Liao <shihua@iscas.ac.cn> gcc/testsuite/ChangeLog: * gcc.target/riscv/zba-slliuw.c: Apply zbs to this testcase. * gcc.target/riscv/zbs-bclr.c: New. * gcc.target/riscv/zbs-bext.c: Ditto. * gcc.target/riscv/zbs-binv.c: Ditto. * gcc.target/riscv/zbs-bset.c: Ditto. Co-authored-by: Kito Cheng <kito.cheng@sifive.com> Co-authored-by: Jia-Wei Chen <jiawei@iscas.ac.cn> Co-authored-by: Shi-Hua Liao <shihua@iscas.ac.cn>
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/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gc_zbs -mabi=lp64 -O2" } */ | ||
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/* bclr */ | ||
long | ||
foo0 (long i, long j) | ||
{ | ||
return i & ~(1L << j); | ||
} | ||
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||
/* bclri */ | ||
long | ||
foo1 (long i) | ||
{ | ||
return i & ~(1L << 20); | ||
} | ||
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||
/* { dg-final { scan-assembler-times "bclr\t" 1 } } */ | ||
/* { dg-final { scan-assembler-times "bclri\t" 1 } } */ | ||
/* { dg-final { scan-assembler-not "andi" } } */ |
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/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gc_zbs -mabi=lp64 -O2" } */ | ||
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/* bext */ | ||
long | ||
foo0 (long i, long j) | ||
{ | ||
return 1L & (i >> j); | ||
} | ||
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||
/* bexti */ | ||
long | ||
foo1 (long i) | ||
{ | ||
return 1L & (i >> 20); | ||
} | ||
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/* { dg-final { scan-assembler-times "bexti\t" 1 } } */ | ||
/* { dg-final { scan-assembler-times "bext\t" 1 } } */ | ||
/* { dg-final { scan-assembler-not "andi" } } */ |
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@@ -0,0 +1,20 @@ | ||
/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gc_zbs -mabi=lp64 -O2" } */ | ||
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/* binv */ | ||
long | ||
foo0 (long i, long j) | ||
{ | ||
return i ^ (1L << j); | ||
} | ||
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/* binvi */ | ||
long | ||
foo1 (long i) | ||
{ | ||
return i ^ (1L << 20); | ||
} | ||
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/* { dg-final { scan-assembler-times "binv\t" 1 } } */ | ||
/* { dg-final { scan-assembler-times "binvi\t" 1 } } */ | ||
/* { dg-final { scan-assembler-not "andi" } } */ |
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/* { dg-do compile } */ | ||
/* { dg-options "-march=rv64gc_zbs -mabi=lp64 -O2" } */ | ||
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/* bset */ | ||
long | ||
sub0 (long i, long j) | ||
{ | ||
return i | (1L << j); | ||
} | ||
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/* bset_mask */ | ||
long | ||
sub1 (long i, long j) | ||
{ | ||
return i | (1L << (j & 0x3f)); | ||
} | ||
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/* bset_1 */ | ||
long | ||
sub2 (long i) | ||
{ | ||
return 1L << i; | ||
} | ||
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/* bset_1_mask */ | ||
long | ||
sub3 (long i) | ||
{ | ||
return 1L << (i & 0x3f); | ||
} | ||
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/* bseti */ | ||
long | ||
sub4 (long i) | ||
{ | ||
return i | (1L << 20); | ||
} | ||
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/* { dg-final { scan-assembler-times "bset\t" 4 } } */ | ||
/* { dg-final { scan-assembler-times "bseti\t" 1 } } */ | ||
/* { dg-final { scan-assembler-not "andi" } } */ |