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i386: Improve code generation for vector __builtin_signbit (x.x[i]) ?…
… -1 : 0 [PR112816] On the testcase I've recently fixed I've noticed bad code generation, we emit pxor %xmm1, %xmm1 psrld $31, %xmm0 pcmpeqd %xmm1, %xmm0 pcmpeqd %xmm1, %xmm0 or vpxor %xmm1, %xmm1, %xmm1 vpsrld $31, %xmm0, %xmm0 vpcmpeqd %xmm1, %xmm0, %xmm0 vpcmpeqd %xmm1, %xmm0, %xmm2 rather than psrad $31, %xmm2 or vpsrad $31, %xmm1, %xmm2 The following patch fixes that using a combiner splitter. 2023-12-05 Jakub Jelinek <jakub@redhat.com> PR target/112816 * config/i386/sse.md ((eq (eq (lshiftrt x elt_bits-1) 0) 0)): New splitter to turn psrld $31; pcmpeq; pcmpeq into psrad $31. * gcc.target/i386/pr112816.c: New test.
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