Pull requests: gem5/gem5
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arch-riscv: add agnostic option to vector tail/mask policy for mem and arith instructions
arch-riscv
The RISC-V ISA
#1135
opened May 14, 2024 by
saul44203
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arch-riscv: Fix vrgather instruction
arch-riscv
The RISC-V ISA
#1134
opened May 14, 2024 by
QQeg
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arch-vega: Template MFMA instructions
arch-vega
The VEGA ISA
#1128
opened May 13, 2024 by
mjkpolo
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Revert "cpu-kvm: Support perf counters on hybrid host architectures"
cpu-kvm
gem5's KVM CPU
#1127
opened May 13, 2024 by
Harshil2107
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arch-riscv: Add RVV FP16 support (Zvfh & Zvfhmin)
arch-riscv
The RISC-V ISA
#1123
opened May 11, 2024 by
QQeg
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mem-ruby: Reduce handshaking between CorePair and dir
mem-ruby
Ruby caches, structures, and protocols
#1117
opened May 8, 2024 by
NSurawar
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cpu-minor: Integrate Minor's executeStats with int/fp/vec ALU Accesses
stats
The gem5 statistics code and related infrastructure
#1108
opened May 6, 2024 by
poal023
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util, ext: Fix building TLM
ext
Components external to gem5 such as third-party code. Typically found in "ext"
util
Utilities for gem5. Typically found in "util"
#1105
opened May 5, 2024 by
Lukas-Zenick
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mem-ruby, configs: Add a generic CHI controller as a stepping stone for ruby+classic topology
mem-ruby
Ruby caches, structures, and protocols
#1084
opened Apr 30, 2024 by
giactra
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arch-x86: Fix TLB Assertion Error on CFLUSH
arch-x86
The X86 ISA
#1080
opened Apr 28, 2024 by
Lukas-Zenick
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cpu,arch: Add IsInvalid flag to Unknown insts
arch
General gem5 architecture-specific components
cpu
General gem5 CPU code (e.g., `BaseCPU`)
configs,cpu: Enable the config run in multi-ISA gem5
configs
gem5's Preprepared Python Configuration scripts. Typically found in "configs"
cpu
General gem5 CPU code (e.g., `BaseCPU`)
#1068
opened Apr 24, 2024 by
rogerchang23424
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Draft
cpu-o3: Clear thread state in time buffers on thread exit
cpu-o3
gem5's Out-Of-Order CPU
#1052
opened Apr 21, 2024 by
nmosier
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cpu: Don't change to suspend if the thread status is halted
cpu
General gem5 CPU code (e.g., `BaseCPU`)
#1039
opened Apr 19, 2024 by
rogerchang23424
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tests,docker: Drop support for GCC <v11 and Clang <v14
github
gem5 files necessary for GitHub integration. Found in ".github"
util-docker
Docker util files. That found in "utils/docker"
#1020
opened Apr 14, 2024 by
BobbyRBruce
•
Draft
util-docker,github: Move to Docker buildx multi-platform builds
github
gem5 files necessary for GitHub integration. Found in ".github"
util-docker
Docker util files. That found in "utils/docker"
#1019
opened Apr 14, 2024 by
BobbyRBruce
•
Draft
stdlib: Improve gem5 PyStats
stats
The gem5 statistics code and related infrastructure
stdlib
The gem5 standard library. Code typically found under "src/pythongem5"
Fix Intel MCG_CAP MSR update on switch
arch-x86
The X86 ISA
#957
opened Mar 22, 2024 by
Foxy-Boxes
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python,stdlib: Improve exit event return
python
gem5's Python SimObject wrapping and infrastructure
stdlib
The gem5 standard library. Code typically found under "src/pythongem5"
#947
opened Mar 19, 2024 by
BobbyRBruce
•
Draft
stdlib: Add multiprocessing simulation class
stdlib
The gem5 standard library. Code typically found under "src/pythongem5"
util: Use 'tail' to ensure action.run.log <=1MB
github
gem5 files necessary for GitHub integration. Found in ".github"
util
Utilities for gem5. Typically found in "util"
#930
opened Mar 11, 2024 by
BobbyRBruce
•
Draft
Adding schedule_next_max_ticks to Simulator
python
gem5's Python SimObject wrapping and infrastructure
#927
opened Mar 11, 2024 by
mahyarsamani
•
Draft
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