Homogeneous Coercions #160
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Author: Ningning Xie <xnningxie@gmail.com>
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Can you explain in your commit message what this accomplishes? Can you explain in the source what purposes the invariants enforced by your assertions are supposed to serve? |
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Ohhhh sorry it seems like I PR to the wrong place. So sorry for the inconvenience caused |
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We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
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Sep 11, 2020
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
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Sep 11, 2020
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
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Nov 10, 2020
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
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Nov 12, 2020
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
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Nov 26, 2020
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
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Mar 9, 2021
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
pushed a commit
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Mar 9, 2021
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
pushed a commit
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Mar 9, 2021
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
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Mar 13, 2021
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
ghc-mirror-bot
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Mar 22, 2021
We don't need to do the callee save register dance. The compiler will do this for us already: 0000000000000000 <StgRun>: 0: a9b653f3 stp x19, x20, [sp, #-160]! 4: a9015bf5 stp x21, x22, [sp, #16] 8: a90263f7 stp x23, x24, [sp, #32] c: a9036bf9 stp x25, x26, [sp, #48] 10: a90473fb stp x27, x28, [sp, #64] 14: f9002bfe str x30, [sp, #80] 18: 6d0627e8 stp d8, d9, [sp, #96] 1c: 6d072fea stp d10, d11, [sp, #112] 20: 6d0837ec stp d12, d13, [sp, #128] 24: 6d093fee stp d14, d15, [sp, #144] 28: a9bf47f0 stp x16, x17, [sp, #-16]! 2c: d14013ff sub sp, sp, #0x4, lsl #12 30: aa0103f3 mov x19, x1 34: d61f0000 br x0 0000000000000038 <StgReturn>: 38: 914013ff add sp, sp, #0x4, lsl #12 3c: aa1603e0 mov x0, x22 40: a8c147f0 ldp x16, x17, [sp], #16 44: a9415bf5 ldp x21, x22, [sp, #16] 48: a94263f7 ldp x23, x24, [sp, #32] 4c: a9436bf9 ldp x25, x26, [sp, #48] 50: a94473fb ldp x27, x28, [sp, #64] 54: f9402bfe ldr x30, [sp, #80] 58: 6d4627e8 ldp d8, d9, [sp, #96] 5c: 6d472fea ldp d10, d11, [sp, #112] 60: 6d4837ec ldp d12, d13, [sp, #128] 64: 6d493fee ldp d14, d15, [sp, #144] 68: a8ca53f3 ldp x19, x20, [sp], #160 6c: d65f03c0 ret
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