More DOM improvements (#1806)

* First try to handle names.

* Reworked names.

* Reworked range expressions.

* Handle AttributeNames.

* Added handling of file declaration and attribute declarations.

* Improved error outputs.

* Handle protected types.

* Make black happy with ugly code.

* Handle Null literal and File parameters.

* File type and physical type.

* Don't fail on reported syntax errors.
Catch call errors into libghdl.

* Improved Sanity checks for pyGHDL.dom.

* Load sourcecode via Python and process in-memory.
Fixed testcases.

* Added package instantiations and packages with generics.

* Added UseClause, AttributeSpecification and PhysicalTypes.

* Improved pretty-printing.

* Fixed AttributeName in subtype indication.

* Get code position of IIR nodes.

* Added DOMMixin into all derived classes.

* Mark as not yet implemented.

* Pinned pyVHDLModel version to v0.10.4.

* Removed xfail in LSP test.
Bumped requirement of pyVHDLModel to v0.10.4.
Fixed some Codacy issues.

(cherry picked from commit f64e7ed7c3d69cbf84cd60db8e9b085e90b846cb)

pyGHDL/cli/DOM.py

@@ -4,12 +4,13 @@
 from sys import exit as sysexit
 
 from pathlib import Path
+from textwrap import dedent
 
 from pydecor import export
 
 from pyGHDL import GHDLBaseException
 from pyGHDL.libghdl import LibGHDLException
-from pyGHDL.dom.Common import DOMException
+from pyGHDL.dom import DOMException
 from pyGHDL.dom.NonStandard import Design, Document
 from pyGHDL.dom.formatting.prettyprint import PrettyPrint, PrettyPrintException
 
@@ -41,6 +42,19 @@ def prettyPrint(self):
 
         print("\n".join(buffer))
 
+        document: Document = self._design.Documents[0]
+        print()
+        print(
+            "libghdl processing time: {: 5.3f} us".format(
+                document.LibGHDLProcessingTime * 10 ** 6
+            )
+        )
+        print(
+            "DOM translation time:    {:5.3f} us".format(
+                document.DOMTranslationTime * 10 ** 6
+            )
+        )
+
 
 def handleException(ex):
     if isinstance(ex, PrettyPrintException):
@@ -52,6 +66,7 @@ def handleException(ex):
         if ex2 is not None:
             for message in ex2.InternalErrors:
                 print("libghdl: {message}".format(message=message))
+            return 0
         return 4
     elif isinstance(ex, LibGHDLException):
         print("LIB:", ex)
@@ -81,8 +96,23 @@ def main(items=argv[1:]):
             app = Application()
             app.addFile(Path(item), "default_lib")
             app.prettyPrint()
-        except Exception as ex:
+        except GHDLBaseException as ex:
             _exitcode = handleException(ex)
+        except Exception as ex:
+            print(
+                dedent(
+                    """\
+                    Fatal: An unhandled exception has reached to the top-most exception handler.
+                    Exception: {name}
+                    """.format(
+                        name=ex.__class__.__name__
+                    )
+                )
+            )
+            if isinstance(ex, ValueError):
+                print("  Message: {msg}".format(msg=str(ex)))
+            if ex.__cause__ is not None:
+                print("Cause:     {msg}".format(msg=str(ex.__cause__)))
 
     return _exitcode
 

pyGHDL/dom/Aggregates.py

@@ -41,8 +41,6 @@
 """
 from pydecor import export
 
-from pyGHDL.dom.Range import Range
-from pyGHDL.dom.Symbol import EnumerationLiteralSymbol
 from pyVHDLModel.VHDLModel import (
     SimpleAggregateElement as VHDLModel_SimpleAggregateElement,
     IndexedAggregateElement as VHDLModel_IndexedAggregateElement,
@@ -51,44 +49,60 @@
     OthersAggregateElement as VHDLModel_OthersAggregateElement,
     Expression,
 )
+from pyGHDL.libghdl._types import Iir
+from pyGHDL.dom import DOMMixin
+from pyGHDL.dom.Range import Range
+from pyGHDL.dom.Symbol import EnumerationLiteralSymbol
 
 
 __all__ = []
 
 
 @export
-class SimpleAggregateElement(VHDLModel_SimpleAggregateElement):
-    def __init__(self, expression: Expression):
+class SimpleAggregateElement(VHDLModel_SimpleAggregateElement, DOMMixin):
+    def __init__(self, node: Iir, expression: Expression):
         super().__init__()
+        DOMMixin.__init__(self, node)
+
         self._expression = expression
 
 
 @export
-class IndexedAggregateElement(VHDLModel_IndexedAggregateElement):
-    def __init__(self, index: Expression, expression: Expression):
+class IndexedAggregateElement(VHDLModel_IndexedAggregateElement, DOMMixin):
+    def __init__(self, node: Iir, index: Expression, expression: Expression):
         super().__init__()
+        DOMMixin.__init__(self, node)
+
         self._index = index
         self._expression = expression
 
 
 @export
-class RangedAggregateElement(VHDLModel_RangedAggregateElement):
-    def __init__(self, r: Range, expression: Expression):
+class RangedAggregateElement(VHDLModel_RangedAggregateElement, DOMMixin):
+    def __init__(self, node: Iir, r: Range, expression: Expression):
         super().__init__()
+        DOMMixin.__init__(self, node)
+
         self._range = r
         self._expression = expression
 
 
 @export
-class NamedAggregateElement(VHDLModel_NamedAggregateElement):
-    def __init__(self, name: EnumerationLiteralSymbol, expression: Expression):
+class NamedAggregateElement(VHDLModel_NamedAggregateElement, DOMMixin):
+    def __init__(
+        self, node: Iir, name: EnumerationLiteralSymbol, expression: Expression
+    ):
         super().__init__()
+        DOMMixin.__init__(self, node)
+
         self._name = name
         self._expression = expression
 
 
 @export
-class OthersAggregateElement(VHDLModel_OthersAggregateElement):
-    def __init__(self, expression: Expression):
+class OthersAggregateElement(VHDLModel_OthersAggregateElement, DOMMixin):
+    def __init__(self, node: Iir, expression: Expression):
         super().__init__()
+        DOMMixin.__init__(self, node)
+
         self._expression = expression

pyGHDL/dom/Attribute.py

@@ -0,0 +1,83 @@
+# =============================================================================
+#               ____ _   _ ____  _          _
+#  _ __  _   _ / ___| | | |  _ \| |      __| | ___  _ __ ___
+# | '_ \| | | | |  _| |_| | | | | |     / _` |/ _ \| '_ ` _ \
+# | |_) | |_| | |_| |  _  | |_| | |___ | (_| | (_) | | | | | |
+# | .__/ \__, |\____|_| |_|____/|_____(_)__,_|\___/|_| |_| |_|
+# |_|    |___/
+# =============================================================================
+# Authors:
+#   Patrick Lehmann
+#
+# Package module:   DOM: Interface items (e.g. generic or port)
+#
+# License:
+# ============================================================================
+#  Copyright (C) 2019-2021 Tristan Gingold
+#
+#  This program is free software: you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation, either version 2 of the License, or
+#  (at your option) any later version.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program.  If not, see <gnu.org/licenses>.
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+# ============================================================================
+from pydecor import export
+
+from pyVHDLModel.VHDLModel import (
+    Attribute as VHDLModel_Attribute,
+    AttributeSpecification as VHDLModel_AttributeSpecification,
+    Name,
+    SubTypeOrSymbol,
+)
+from pyGHDL.libghdl._types import Iir
+from pyGHDL.libghdl.vhdl import nodes
+from pyGHDL.dom import DOMMixin
+from pyGHDL.dom._Utils import GetNameOfNode, GetIirKindOfNode
+from pyGHDL.dom._Translate import GetNameFromNode
+from pyGHDL.dom.Symbol import SimpleSubTypeSymbol
+
+
+@export
+class Attribute(VHDLModel_Attribute, DOMMixin):
+    def __init__(self, node: Iir, name: str, subType: SubTypeOrSymbol):
+        super().__init__(name, subType)
+        DOMMixin.__init__(self, node)
+
+    @classmethod
+    def parse(cls, attributeNode: Iir) -> "Attribute":
+        name = GetNameOfNode(attributeNode)
+        subTypeMark = nodes.Get_Type_Mark(attributeNode)
+        subTypeName = GetNameOfNode(subTypeMark)
+
+        subType = SimpleSubTypeSymbol(subTypeMark, subTypeName)
+        return cls(attributeNode, name, subType)
+
+
+@export
+class AttributeSpecification(VHDLModel_AttributeSpecification, DOMMixin):
+    def __init__(self, node: Iir, attribute: Name):
+        super().__init__(attribute)
+        DOMMixin.__init__(self, node)
+
+    @classmethod
+    def parse(cls, attributeNode: Iir) -> "AttributeSpecification":
+        attributeDesignator = nodes.Get_Attribute_Designator(attributeNode)
+        attributeName = GetNameFromNode(attributeDesignator)
+
+        # FIXME: needs an implementation
+        entityNameList = nodes.Get_Entity_Name_List(attributeNode)
+        enlk = GetIirKindOfNode(entityNameList)
+
+        entityClass = nodes.Get_Entity_Class(attributeNode)
+        eck = GetIirKindOfNode(entityClass)
+
+        return cls(attributeNode, attributeName)