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entity repro1 is | ||
end; | ||
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architecture behav of repro1 is | ||
constant c : natural := 5 % 4; | ||
begin | ||
end; |
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entity tb_thingy is | ||
end tb_thingy; | ||
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architecture tb of tb_thingy is | ||
component thingy is | ||
generic ( | ||
a_a : integer | ||
); | ||
port ( | ||
x_x : in bit; | ||
y_y : out bit | ||
); | ||
end component; | ||
signal stimuli : bit; | ||
signal response : bit; | ||
begin | ||
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dut : thingy | ||
generic map ( | ||
a_a => 42 | ||
) | ||
port map ( | ||
x%x => stimuli, -- <== | ||
y_y => response | ||
); | ||
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||
end tb; |
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entity tb_thingy is | ||
end tb_thingy; | ||
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architecture tb of tb_thingy is | ||
component thingy is | ||
generic ( | ||
a_a : integer | ||
); | ||
port ( | ||
x%x : in bit; -- <== | ||
y_y : out bit | ||
); | ||
end component; | ||
signal stimuli : bit; | ||
signal response : bit; | ||
begin | ||
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dut : thingy | ||
generic map ( | ||
a_a => 42 | ||
) | ||
port map ( | ||
x_x => stimuli, | ||
y_y => response | ||
); | ||
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||
end tb; |
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#! /bin/sh | ||
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. ../../testenv.sh | ||
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analyze_failure tb_thingy7.vhdl | ||
analyze_failure tb_thingy9.vhdl | ||
analyze_failure repro1.vhdl | ||
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clean | ||
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echo "Test successful" |