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Deployment of Deep learning Image Super-Resolution Models in Xilinx Zynq MPSoC ZCU102

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gkrislara/Image-super-resolution-FPGA

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Edge Inference of Image Super Resolution Deep Learning Models

Deployment of Deep learning Image Super-Resolution Models in Xilinx Zynq MPSoC ZCU102

Instructions

Follow the .pdf file in the repository for complete information

Prerequisites

  • Knowledge on FPGA and Integrating IPs in Vivado
  • Knowledge on Computer Architecture and Embedded Systems
  • Linux Operating system - Petalinux/Yocto
  • Basics of Deep learning
  • Programming Languages: Cpp and Python
  • Frameworks/libraries: Opencv,Numpy,Tensorflow

Tools

  • Vitis v2019.2
  • Vitis AI SDK v1.0
  • Vivado v2019.2
  • Petalinux v2019.2

Credits

Citation

This is my Under Graduate Project done at Healthcare Technology Innovation Centre IIT Madras. Please Cite if it helps your work

@misc{gokulakrishnan2020ISRFPGA,
  title={Deploying Deep learning Image Super-Resolution Models in Xilinx Zynq MPSoC ZCU102},
  author={Gokula Krishnan Ravi},
  year={2020},
  howpublished={\url{https://github.com/gkrislara/Image-super-resolution-FPGA}},
}

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