//discontinued... (03.2016)
Since I'm no longer a student at RRC, this repo (DIGI-2224) will no longer be maintained. I've made all my labs (up to year 3) public domain and is now available for download to students who wish to use it as referance. An .nzb file is also available for Usenet subscribers.
On that note, please have some self-control and avoid using my labs to cheat. You paid money to learn, not to get a diploma. If you're having trouble with this course seek help (peer tutoring).
📎 Download: https://mega.nz/#!sYF2BZSR
🔑 Decryption Key: !tNys0zdgjtT2zAdE7xS2lox_rCxklZhbeGLoW33pCwE
📄 Usenet .nzb file: https://mega.nz/#!YE0kDRTL!T2eocMEFgQ7i8UnwdXqBazskp6YJpJR4xa7GSTIgds4
This is a version control repo for the DIGI-2224 course offered at Red River College. It is intended to document my progress with VHDL programming and help students meet deadlines. You may download, review, or comment on the code for reference.
If you are looking for my own projects concerning VHDL, you can check out my AlteraMax.Playground sandbox. I highly recommend you buy PyroElectro's Intro to FPGA kit. No point in learning all this if you're not gonna use it outside of the classroom.
Students: you should at least try and attempt the labs before or after resorting to the finished lab in this repo. The intent of this repo is to give you a buffer for deadlines, not cheat. If you end up having to rely on this repo be sure make time for the labs you missed and do them yourselfs!