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cpu: fix cpu cacheLineSize for arm64 darwin(a.k.a. M1)
The existing value for M1 is 64, which is the same as other arm64 cpus. But the correct cacheLineSize for M1 should be 128, which can be verified using the following command: $ sysctl -a hw | grep cachelinesize hw.cachelinesize: 128 Fixes golang/go#53075 Change-Id: I555716ed412cdc02941c8b1d9767952f7ad6678c Reviewed-on: https://go-review.googlesource.com/c/sys/+/408614 Run-TryBot: Keith Randall <khr@golang.org> Reviewed-by: Keith Randall <khr@golang.org> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Joedian Reid <joedian@golang.org> Reviewed-by: Keith Randall <khr@google.com>
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