Fix building verilated CFU for multiple sources

[robertszczepanski]

Fixes #293

Verilator will now treat project directory as an include directory and verilog source path is taken from $(CFU_VERILOG) variable. There was also a typo in this variable that created a path with additional space at the beginning ( /path/to/file instead of /path/to/file),

FYI @tcal-x

[tcal-x]

I retried make renode in proj/kws_micro_accel on this branch (fix-sv-build), after downloading the newest Renode. I see a lot of red timeout errors reported to the original terminal where I typed make renode, constantly scrolling:

22:50:13.0747 [ERROR] cpu.cfu0: CFU operation timeout, opcode: 0xd6878b, error: CfuTimeout
22:50:13.0767 [ERROR] cpu.cfu0: CFU operation timeout, opcode: 0x3e6160b, error: CfuTimeout (15)
22:50:13.0769 [ERROR] cpu.cfu0: CFU operation timeout, opcode: 0x2f6178b, error: CfuTimeout
22:50:13.0769 [ERROR] cpu.cfu0: CFU operation timeout, opcode: 0xb7a78b, error: CfuTimeout
22:50:13.0770 [ERROR] cpu.cfu0: CFU operation timeout, opcode: 0xb6c58b, error: CfuTimeout

Also, the model golden tests (1-1-g on the menu) don't pass.

Is that what you see, @robertszczepanski ? If you're seeing something different, then we need to figure out what's different in our setups.

[robertszczepanski]

Hi @tcal-x I investigated this error and it turns out that there was a logic issue in Renode. I added a commit that bumps Renode to a version with a fix for that.
There is also tick synchronization of CPU and CFU turned off by default. It greatly improves simulation speed and you can easily turn it back on by adding frequency parameter to CFU constructor in .repl file.

I've tested these changes with mnv2_first, kws_micro_accel, hps_accel and example_cfu.

Remember to remove third_paty/renode and run scripts/setup to apply Renode update before testing this.

[tcal-x]

Thanks @robertszczepanski , I'll test it later today.

[tcal-x]

LGTM