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CycleClock: Add support for Alpha architecture #1753

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Feb 13, 2024
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9 changes: 9 additions & 0 deletions src/cycleclock.h
Original file line number Diff line number Diff line change
Expand Up @@ -218,6 +218,15 @@ inline BENCHMARK_ALWAYS_INLINE int64_t Now() {
uint64_t pcycle;
asm volatile("%0 = C15:14" : "=r"(pcycle));
return static_cast<double>(pcycle);
#elif defined(__alpha__)
// Alpha has a cycle counter, the PCC register, but it is an unsigned 32-bit
// integer and thus wraps every ~4s, making using it for tick counts
// unreliable beyond this time range. The real-time clock is low-precision,
// roughtly ~1ms, but it is the only option that can reasonable count
// indefinitely.
struct timeval tv;
gettimeofday(&tv, nullptr);
return static_cast<int64_t>(tv.tv_sec) * 1000000 + tv.tv_usec;
#else
// The soft failover to a generic implementation is automatic only for ARM.
// For other platforms the developer is expected to make an attempt to create
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4 changes: 4 additions & 0 deletions src/sysinfo.cc
Original file line number Diff line number Diff line change
Expand Up @@ -513,7 +513,11 @@ int GetNumCPUs() {
std::cerr << "failed to open /proc/cpuinfo\n";
return -1;
}
#if defined(__alpha__)
const std::string Key = "cpus detected";
#else
const std::string Key = "processor";
#endif
std::string ln;
while (std::getline(f, ln)) {
if (ln.empty()) continue;
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3 changes: 3 additions & 0 deletions test/user_counters_tabular_test.cc
Original file line number Diff line number Diff line change
Expand Up @@ -63,6 +63,9 @@ ADD_CASES(TC_CSVOut, {{"%csv_header,"

void BM_Counters_Tabular(benchmark::State& state) {
for (auto _ : state) {
// This test requires a non-zero CPU time to avoid divide-by-zero
auto iterations = state.iterations();
benchmark::DoNotOptimize(iterations);
}
namespace bm = benchmark;
state.counters.insert({
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