Application level functionality (examples, uses of XLS stack)
Something isn't working or is incorrect
Related to build flow, build system, or build macros
An issue that could not be reproduced
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Tech debt reduction, factoring, consolidation, rework, etc.
Everything w.r.t. code quality, maintenance, TODOs
Related to emitting (System)Verilog.
Relating to Communicating Sequential Processes or Kahn Process Network style concurrency models
Predicting/modeling delays of target (backend) processes
Pull requests that update a dependency file
Improvements or additions to documentation
DSLX language server/protocol implementation
DSLX (domain specific language) implementation / front-end
This issue or pull request already exists
Not yet confirmed as a duplicate but expected that it is.
"Foreign Function" Interfacing (with SystemVerilog)
Related to formal / Logical Equivalence Checking