Bluespexamples

Bluespec Examples (Bluespexamples)

Index

Design wise examples:

Design	Description
Adder	half adder full adder using two half adders and OR adder tree
Multiplier	simple multiplier mac_1x1 mac_2x2 using four mac_1x1
Counter	counter
Shifter	shifter
Sorter	cae bm4 using six cae blocks
Sequence Detector	SeqDet
Communication Protocols	UART SPI I2C USB Ethernet

Topic wise examples:

Design	Description
FIFO
Get Put
Client Server
Connectable
Vectors

Directory Structure

├── Makefile		    (Make html docs and view)
├── NOTES.adoc 	        (BSV notes)
├── README.adoc		    (This doc)
├── build		        (Build folder for all bsv projects)
│   ├── Makefile	    (Make verilog files and simulate)
│   ├── makefile.inc	(Insert file names and path)
│   └── verilog_dir/ 	(Verilog files compiled from src)
├── src/
│   ├── Common/		    (Common files)
|   ├── <Designs>       (Refer Index)
│   └── workspace/	    (Scratch worspace)
└── waveforms/          (Contains all the simulation waveform screenshots)

Coding Guidelines

Prefix	Meaning
mk_	module
Ifc_	Interface
subifc_	Sub Interface
fn_	Function
rl_	rule
ma_	Method Action
mv_	Method Value
mav_	Method ActionValue
rg_	register
wr_	wire
tpl_	tuple
ff_	fifo

Resources:

Courses

• 6.375 - Complex Digital Systems

• 6.175 - Constructive Computer Architecture (Fall 2017)

• 6.S078 - Computer Architecture: A Constructive Approach

Readings

• BSV by example

• BSV Reference Guide

• BSV User Guide

• Computer Architecture: A Constructive Approach

Lecture Series:

• Youtube: MIT 6.004 Computation Structures Fall 2018 - All Lectures