gateware.interface.psram: update HyperRAM interface #233
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This fits better with `write_ready` and makes it more similar to FIFOInterface signals.
Read data/ready signals are now driven from the combinatorial domain. This also fixes an off-by-one read error in `hyperram_diagnostic`. A consumer must now be aware of this change and register the data as it arrives if needed.
This is a workaround to fix reads when the clock edges are not aligned as expected. A better solution would involve using the RWDS signal for sampling alignment.
mndza
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Mar 7, 2024
Fixes instantiation after changes in greatscottgadgets/luna#233.
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The new interface uses ECP5 DDR primitives instead of relying on a logic-generated clock signal.
Updates
interactive_testandhyperram_diagnosticapplets as well.