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Remove deprecated HVX_shared_object feature #7331

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1 change: 0 additions & 1 deletion python_bindings/src/halide/halide_/PyEnums.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -144,7 +144,6 @@ void define_enums(py::module &m) {
.value("HVX_v62", Target::Feature::HVX_v62)
.value("HVX_v65", Target::Feature::HVX_v65)
.value("HVX_v66", Target::Feature::HVX_v66)
.value("HVX_shared_object", Target::Feature::HVX_shared_object)
.value("FuzzFloatStores", Target::Feature::FuzzFloatStores)
.value("SoftFloatABI", Target::Feature::SoftFloatABI)
.value("MSAN", Target::Feature::MSAN)
Expand Down
5 changes: 1 addition & 4 deletions src/Target.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -302,7 +302,6 @@ bool is_using_hexagon(const Target &t) {
t.has_feature(Target::HVX_v65) ||
t.has_feature(Target::HVX_v66) ||
t.has_feature(Target::HexagonDma) ||
t.has_feature(Target::HVX_shared_object) ||
t.arch == Target::Hexagon);
}

Expand Down Expand Up @@ -484,7 +483,6 @@ const std::map<std::string, Target::Feature> feature_name_map = {
{"hvx_v62", Target::HVX_v62},
{"hvx_v65", Target::HVX_v65},
{"hvx_v66", Target::HVX_v66},
{"hvx_shared_object", Target::HVX_shared_object},
{"fuzz_float_stores", Target::FuzzFloatStores},
{"soft_float_abi", Target::SoftFloatABI},
{"msan", Target::MSAN},
Expand Down Expand Up @@ -1197,7 +1195,6 @@ bool Target::get_runtime_compatible_target(const Target &other, Target &result)
Debug,
HexagonDma,
HVX,
HVX_shared_object,
MSAN,
SoftFloatABI,
TSAN,
Expand Down Expand Up @@ -1231,7 +1228,7 @@ bool Target::get_runtime_compatible_target(const Target &other, Target &result)
}

if ((features & matching_mask) != (other.features & matching_mask)) {
Internal::debug(1) << "runtime targets must agree on SoftFloatABI, Debug, TSAN, ASAN, MSAN, HVX, HexagonDma, HVX_shared_object, SanitizerCoverage\n"
Internal::debug(1) << "runtime targets must agree on SoftFloatABI, Debug, TSAN, ASAN, MSAN, HVX, HexagonDma, SanitizerCoverage\n"
<< " this: " << *this << "\n"
<< " other: " << other << "\n";
return false;
Expand Down
1 change: 0 additions & 1 deletion src/Target.h
Original file line number Diff line number Diff line change
Expand Up @@ -122,7 +122,6 @@ struct Target {
HVX_v62 = halide_target_feature_hvx_v62,
HVX_v65 = halide_target_feature_hvx_v65,
HVX_v66 = halide_target_feature_hvx_v66,
HVX_shared_object = halide_target_feature_hvx_use_shared_object,
FuzzFloatStores = halide_target_feature_fuzz_float_stores,
SoftFloatABI = halide_target_feature_soft_float_abi,
MSAN = halide_target_feature_msan,
Expand Down
1 change: 0 additions & 1 deletion src/runtime/HalideRuntime.h
Original file line number Diff line number Diff line change
Expand Up @@ -1330,7 +1330,6 @@ typedef enum halide_target_feature_t {
halide_target_feature_avx512_skylake, ///< Enable the AVX512 features supported by Skylake Xeon server processors. This adds AVX512-VL, AVX512-BW, and AVX512-DQ to the base set. The main difference from the base AVX512 set is better support for small integer ops. Note that this does not include the Knight's Landing features. Note also that these features are not available on Skylake desktop and mobile processors.
halide_target_feature_avx512_cannonlake, ///< Enable the AVX512 features expected to be supported by future Cannonlake processors. This includes all of the Skylake features, plus AVX512-IFMA and AVX512-VBMI.
halide_target_feature_avx512_sapphirerapids, ///< Enable the AVX512 features supported by Sapphire Rapids processors. This include all of the Cannonlake features, plus AVX512-VNNI and AVX512-BF16.
halide_target_feature_hvx_use_shared_object, ///< Deprecated
halide_target_feature_trace_loads, ///< Trace all loads done by the pipeline. Equivalent to calling Func::trace_loads on every non-inlined Func.
halide_target_feature_trace_stores, ///< Trace all stores done by the pipeline. Equivalent to calling Func::trace_stores on every non-inlined Func.
halide_target_feature_trace_realizations, ///< Trace all realizations done by the pipeline. Equivalent to calling Func::trace_realizations on every non-inlined Func.
Expand Down