-
Notifications
You must be signed in to change notification settings - Fork 0
/
board.xml
217 lines (193 loc) · 11.4 KB
/
board.xml
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<!--
MIT License
Copyright (c) 2021 Hamed Torki, Inc.
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
-->
<board schema_version="2.1" vendor="miner.alinx.com.cn" name="ax7z020" display_name="AX7Z020 Development Board"
url="https://alinx.com/en/detail/271" preset_file="preset.xml">
<!-- Image of the board -->
<images>
<image name="ac7z020.jpg" display_name="AX7Z020 Development Board" sub_type="board">
<description>AX7Z020 Development Board</description>
</image>
</images>
<!-- Board PCB revision -->
<compatible_board_revisions>
<revision id="1">2.0</revision>
</compatible_board_revisions>
<!-- Board file revision -->
<file_version>1.0</file_version>
<!-- Board description -->
<description>
ALINX AX7021: with an AMD Zynq 7000 SoC XC7Z020 FPGA Development board, “SOM AC7021B system-on-module + Carrier
Board”, which is convenient to use the SOM core board for secondary development.
It features embedded processing with Dual ARM Cortex-A9 core processors.
The AX7021 industrial FPGA board includes all the basic components of hardware, and pre-verified reference
designs, the carrier board with 5*Gigabit Ethernet, 4*USB2.0, HDMI Output, Uart, SD Card Slot, 40-Pin Connectors
(expansion opportunities with ALINX Module, such as AD/DA data acquisition module, camera and LCD module). The
AX7021 FPGA Board is suitable for Multi-port high-speed data transmission, data processing and storage, video
transmission processing and industrial control, etc.
</description>
<components>
<component name="part0" display_name="AX7Z020" type="fpga" part_name="xc7z020clg400-2"
pin_map_file="part0_pins.xml" vendor="xilinx" spec_url="www.xilinx.com">
<description>FPGA part on the board</description>
<interfaces>
<interface mode="master" name="btns_4bits" type="xilinx.com:interface:gpio_rtl:1.0"
of_component="btns_4bits" preset_proc="push_buttons_4bits_preset">
<port_maps>
<port_map logical_port="TRI_I" physical_port="btns_4bits_tri_i" dir="in" left="3" right="0">
<pin_maps>
<pin_map port_index="0" component_pin="btns_4bits_tri_i_0"/>
<pin_map port_index="1" component_pin="btns_4bits_tri_i_1"/>
<pin_map port_index="2" component_pin="btns_4bits_tri_i_2"/>
<pin_map port_index="3" component_pin="btns_4bits_tri_i_3"/>
</pin_maps>
</port_map>
</port_maps>
</interface>
<interface mode="master" name="leds_4bits" type="xilinx.com:interface:gpio_rtl:1.0"
of_component="leds_4bits" preset_proc="led_4bits_preset">
<port_maps>
<port_map logical_port="TRI_O" physical_port="leds_4bits_tri_o" dir="out" left="3" right="0">
<pin_maps>
<pin_map port_index="0" component_pin="leds_4bits_tri_o_0"/>
<pin_map port_index="1" component_pin="leds_4bits_tri_o_1"/>
<pin_map port_index="2" component_pin="leds_4bits_tri_o_2"/>
<pin_map port_index="3" component_pin="leds_4bits_tri_o_3"/>
</pin_maps>
</port_map>
</port_maps>
</interface>
<interface mode="master" name="ps7_fixedio" type="xilinx.com:display_processing_system7:fixedio_rtl:1.0"
of_component="ps7_fixedio" preset_proc="ps7_preset">
</interface>
<interface mode="slave" name="sys_clock" type="xilinx.com:signal:clock_rtl:1.0" of_component="sys_clock"
preset_proc="sys_clock_preset">
<port_maps>
<port_map logical_port="CLK" physical_port="sys_clk" dir="in">
<pin_maps>
<pin_map port_index="0" component_pin="sys_clk"/>
</pin_maps>
</port_map>
</port_maps>
<parameters>
<parameter name="frequency" value="50000000"/>
</parameters>
</interface>
<interface mode="master" name="hdmi_out" type="digilentinc.com:interface:tmds_rtl:1.0"
of_component="hdmi_out">
<description>HDMI Out</description>
<preferred_ips>
<preferred_ip vendor="digilentinc.com" library="ip" name="rgb2dvi" order="0"/>
</preferred_ips>
<port_maps>
<port_map logical_port="CLK_P" physical_port="TMDS_OUT_clk_p" dir="out">
<pin_maps>
<pin_map port_index="0" component_pin="TMDS_OUT_clk_p"/>
</pin_maps>
</port_map>
<port_map logical_port="CLK_N" physical_port="TMDS_OUT_clk_n" dir="out">
<pin_maps>
<pin_map port_index="0" component_pin="TMDS_OUT_clk_n"/>
</pin_maps>
</port_map>
<port_map logical_port="DATA_P" physical_port="TMDS_OUT_D_P" dir="out" left="2" right="0">
<pin_maps>
<pin_map port_index="0" component_pin="TMDS_OUT_data_p_0"/>
<pin_map port_index="1" component_pin="TMDS_OUT_data_p_1"/>
<pin_map port_index="2" component_pin="TMDS_OUT_data_p_2"/>
</pin_maps>
</port_map>
<port_map logical_port="DATA_N" physical_port="TMDS_OUT_D_N" dir="out" left="2" right="0">
<pin_maps>
<pin_map port_index="0" component_pin="TMDS_OUT_data_n_0"/>
<pin_map port_index="1" component_pin="TMDS_OUT_data_n_1"/>
<pin_map port_index="2" component_pin="TMDS_OUT_data_n_2"/>
</pin_maps>
</port_map>
</port_maps>
</interface>
<interface mode="master" name="hdmi_out_hpd_led" type="xilinx.com:interface:gpio_rtl:1.0"
of_component="hdmi_out_hpd_led" preset_proc="output_1bit_preset">
<port_maps>
<port_map logical_port="TRI_O" physical_port="hdmi_tx_hpd" dir="out">
<pin_maps>
<pin_map port_index="0" component_pin="hdmi_tx_hpd"/>
</pin_maps>
</port_map>
<port_map logical_port="TRI_I" physical_port="hdmi_tx_hpd" dir="in">
<pin_maps>
<pin_map port_index="0" component_pin="hdmi_tx_hpd"/>
</pin_maps>
</port_map>
<port_map logical_port="TRI_T" physical_port="hdmi_tx_hpd" dir="out">
<pin_maps>
<pin_map port_index="0" component_pin="hdmi_tx_hpd"/>
</pin_maps>
</port_map>
</port_maps>
</interface>
</interfaces>
</component>
<component name="btns_4bits" display_name="4 Buttons" type="chip" sub_type="push_button" major_group="GPIO">
<description>Buttons 3 to 0</description>
</component>
<component name="leds_4bits" display_name="4 LEDs" type="chip" sub_type="led" major_group="GPIO">
<description>LEDs 3 to 0</description>
</component>
<component name="ps7_fixedio" display_name="ps7_fixedio" type="chip" sub_type="fixed_io" major_group=""/>
<component name="sys_clock" display_name="System Clock" type="chip" sub_type="system_clock"
major_group="Clocks">
<description>3.3V Single-Ended 50 MHz oscillator used as system clock on the board</description>
</component>
<component name="hdmi_out" display_name="HDMI out" type="chip" sub_type="fixed_io" major_group="HDMI">
<description>HDMI Out (Requires Digilent's TMDS interface)</description>
</component>
<component name="hdmi_out_hpd_led" display_name="HDMI out HPD" type="chip" sub_type="led" major_group="HDMI">
<description>HDMI out HPD</description>
</component>
</components>
<jtag_chains>
<jtag_chain name="chain1">
<position name="0" component="part0"/>
</jtag_chain>
</jtag_chains>
<connections>
<connection name="part0_btns_4bits" component1="part0" component2="btns_4bits">
<connection_map name="part0_btns_4bits_1" c1_st_index="0" c1_end_index="3" c2_st_index="0"
c2_end_index="3"/>
</connection>
<connection name="part0_leds_4bits" component1="part0" component2="leds_4bits">
<connection_map name="part0_leds_4bits_1" c1_st_index="4" c1_end_index="7" c2_st_index="0"
c2_end_index="3"/>
</connection>
<connection name="part0_sys_clock" component1="part0" component2="sys_clock">
<connection_map name="part0_sys_clock_1" c1_st_index="8" c1_end_index="8" c2_st_index="0"
c2_end_index="0"/>
</connection>
<connection name="part0_hdmi_out" component1="part0" component2="hdmi_out">
<connection_map name="part0_hdmi_out_1" c1_st_index="19" c1_end_index="26" c2_st_index="0"
c2_end_index="7"/>
</connection>
<connection name="part0_hdmi_out_hpd_led" component1="part0" component2="hdmi_out_hpd_led">
<connection_map name="part0_hdmi_out_hpd_led_1" c1_st_index="22" c1_end_index="22" c2_st_index="0"
c2_end_index="0"/>
</connection>
</connections>
</board>