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mediatek: add support for Xiaomi WR30U
Signed-off-by: hank9999 <mchank9999@gmail.com>
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16 changes: 16 additions & 0 deletions
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...ux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-xiaomi-mi-router-wr30u-112m.dts
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
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/dts-v1/; | ||
#include "mt7981-xiaomi-mi-router-wr30u-base.dtsi" | ||
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/ { | ||
model = "Xiaomi Mi Router WR30U (112M UBI layout)"; | ||
compatible = "xiaomi,mi-router-wr30u-112m", "mediatek,mt7981"; | ||
}; | ||
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&partitions { | ||
partition@600000 { | ||
label = "ubi"; | ||
reg = <0x600000 0x7000000>; | ||
}; | ||
}; |
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...x/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-xiaomi-mi-router-wr30u-base.dtsi
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
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/dts-v1/; | ||
#include <dt-bindings/input/input.h> | ||
#include <dt-bindings/gpio/gpio.h> | ||
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#include "mt7981.dtsi" | ||
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/ { | ||
aliases { | ||
serial0 = &uart0; | ||
led-boot = &led_system_yellow; | ||
led-failsafe = &led_system_yellow; | ||
led-running = &led_system_blue; | ||
led-upgrade = &led_system_yellow; | ||
}; | ||
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chosen { | ||
stdout-path = "serial0:115200n8"; | ||
}; | ||
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memory { | ||
reg = <0 0x40000000 0 0x10000000>; | ||
}; | ||
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gpio-keys { | ||
compatible = "gpio-keys"; | ||
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reset { | ||
label = "reset"; | ||
gpios = <&pio 1 GPIO_ACTIVE_LOW>; | ||
linux,code = <KEY_RESTART>; | ||
}; | ||
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mesh { | ||
label = "mesh"; | ||
gpios = <&pio 0 GPIO_ACTIVE_LOW>; | ||
linux,code = <BTN_9>; | ||
linux,input-type = <EV_SW>; | ||
}; | ||
}; | ||
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leds { | ||
compatible = "gpio-leds"; | ||
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led_system_blue: system_blue { | ||
label = "blue:system"; | ||
gpios = <&pio 9 GPIO_ACTIVE_LOW>; | ||
}; | ||
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led_system_yellow: system_yellow { | ||
label = "yellow:system"; | ||
gpios = <&pio 10 GPIO_ACTIVE_LOW>; | ||
}; | ||
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led_network_blue { | ||
label = "blue:network"; | ||
gpios = <&pio 11 GPIO_ACTIVE_LOW>; | ||
}; | ||
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led_network_yellow { | ||
label = "yellow:network"; | ||
gpios = <&pio 12 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
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gsw: gsw@0 { | ||
compatible = "mediatek,mt753x"; | ||
mediatek,ethsys = <ðsys>; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
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nmbm_spim_nand: nmbm_spim_nand { | ||
compatible = "generic,nmbm"; | ||
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#address-cells = <1>; | ||
#size-cells = <1>; | ||
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lower-mtd-device = <&spi_nand>; | ||
forced-create; | ||
}; | ||
}; | ||
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ð { | ||
status = "okay"; | ||
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gmac0: mac@0 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <0>; | ||
phy-mode = "2500base-x"; | ||
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fixed-link { | ||
speed = <2500>; | ||
full-duplex; | ||
pause; | ||
}; | ||
}; | ||
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gmac1: mac@1 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <1>; | ||
phy-mode = "2500base-x"; | ||
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fixed-link { | ||
speed = <2500>; | ||
full-duplex; | ||
pause; | ||
}; | ||
}; | ||
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mdio: mdio-bus { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
}; | ||
}; | ||
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&gsw { | ||
mediatek,mdio = <&mdio>; | ||
mediatek,mdio_master_pinmux = <0>; | ||
reset-gpios = <&pio 39 0>; | ||
interrupt-parent = <&pio>; | ||
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; | ||
status = "okay"; | ||
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port5: port@5 { | ||
compatible = "mediatek,mt753x-port"; | ||
reg = <5>; | ||
phy-mode = "sgmii"; | ||
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fixed-link { | ||
speed = <2500>; | ||
full-duplex; | ||
}; | ||
}; | ||
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port6: port@6 { | ||
compatible = "mediatek,mt753x-port"; | ||
mediatek,ssc-on; | ||
reg = <6>; | ||
phy-mode = "sgmii"; | ||
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fixed-link { | ||
speed = <2500>; | ||
full-duplex; | ||
}; | ||
}; | ||
}; | ||
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&hnat { | ||
mtketh-wan = "eth1"; | ||
mtketh-lan = "eth0"; | ||
mtketh-max-gmac = <2>; | ||
status = "okay"; | ||
}; | ||
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&spi0 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&spi0_flash_pins>; | ||
status = "okay"; | ||
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spi_nand: flash@0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "spi-nand"; | ||
reg = <0>; | ||
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spi-max-frequency = <52000000>; | ||
spi-tx-buswidth = <4>; | ||
spi-rx-buswidth = <4>; | ||
}; | ||
}; | ||
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&nmbm_spim_nand { | ||
partitions: partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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partition@0 { | ||
label = "BL2"; | ||
reg = <0x00 0x100000>; | ||
}; | ||
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partition@100000 { | ||
label = "Nvram"; | ||
reg = <0x100000 0x40000>; | ||
}; | ||
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partition@140000 { | ||
label = "Bdata"; | ||
reg = <0x140000 0x40000>; | ||
}; | ||
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partition@180000 { | ||
label = "Factory"; | ||
reg = <0x180000 0x200000>; | ||
}; | ||
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partition@380000 { | ||
label = "FIP"; | ||
reg = <0x380000 0x200000>; | ||
}; | ||
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partition@580000 { | ||
label = "crash"; | ||
reg = <0x580000 0x40000>; | ||
}; | ||
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partition@5c0000 { | ||
label = "crash_log"; | ||
reg = <0x5c0000 0x40000>; | ||
}; | ||
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partition@7600000 { | ||
label = "KF"; | ||
reg = <0x7600000 0x40000>; | ||
}; | ||
}; | ||
}; | ||
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&pio { | ||
spi0_flash_pins: spi0-pins { | ||
mux { | ||
function = "spi"; | ||
groups = "spi0", "spi0_wp_hold"; | ||
}; | ||
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conf-pu { | ||
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; | ||
drive-strength = <MTK_DRIVE_8mA>; | ||
bias-pull-up = <MTK_PUPD_SET_R1R0_11>; | ||
}; | ||
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conf-pd { | ||
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; | ||
drive-strength = <MTK_DRIVE_8mA>; | ||
bias-pull-down = <MTK_PUPD_SET_R1R0_11>; | ||
}; | ||
}; | ||
}; | ||
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&uart0 { | ||
status = "okay"; | ||
}; | ||
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&watchdog { | ||
status = "okay"; | ||
}; |
28 changes: 28 additions & 0 deletions
28
...x/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-xiaomi-mi-router-wr30u-stock.dts
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
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/dts-v1/; | ||
#include "mt7981-xiaomi-mi-router-wr30u-base.dtsi" | ||
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/ { | ||
model = "Xiaomi Mi Router WR30U (stock layout)"; | ||
compatible = "xiaomi,mi-router-wr30u-stock", "mediatek,mt7981"; | ||
}; | ||
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&partitions { | ||
// ubi_kernel is the ubi partition in stock. | ||
partition@600000 { | ||
label = "ubi_kernel"; | ||
reg = <0x600000 0x2200000>; | ||
}; | ||
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/* ubi is the result of squashing | ||
* consecutive stock partitions: | ||
* - ubi1 | ||
* - overlay | ||
* - data | ||
*/ | ||
partition@2800000 { | ||
label = "ubi"; | ||
reg = <0x2800000 0x4e00000>; | ||
}; | ||
}; |
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