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Merge tag 'v4.9.156' of git://git.kernel.org/pub/scm/linux/kernel/git…
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…/stable/linux-stable into odroidn2-4.9.y

This is the 4.9.156 stable release
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mdrjr committed Feb 13, 2019
2 parents a4c58a1 + 8278355 commit 3b7e1f9
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Showing 145 changed files with 760 additions and 357 deletions.
2 changes: 1 addition & 1 deletion Makefile
@@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 9
SUBLEVEL = 155
SUBLEVEL = 156
EXTRAVERSION =
NAME = Roaring Lionus

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9 changes: 6 additions & 3 deletions arch/arm/boot/dts/mmp2.dtsi
Expand Up @@ -220,12 +220,15 @@
status = "disabled";
};

twsi2: i2c@d4025000 {
twsi2: i2c@d4031000 {
compatible = "mrvl,mmp-twsi";
reg = <0xd4025000 0x1000>;
interrupts = <58>;
reg = <0xd4031000 0x1000>;
interrupt-parent = <&intcmux17>;
interrupts = <0>;
clocks = <&soc_clocks MMP2_CLK_TWSI1>;
resets = <&soc_clocks MMP2_CLK_TWSI1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};

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1 change: 1 addition & 0 deletions arch/arm/boot/dts/omap4-sdp.dts
Expand Up @@ -33,6 +33,7 @@
gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>; /* gpio line 48 */
enable-active-high;
regulator-boot-on;
startup-delay-us = <25000>;
};

vbat: fixedregulator-vbat {
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15 changes: 15 additions & 0 deletions arch/arm/kernel/smp.c
Expand Up @@ -713,6 +713,21 @@ void smp_send_stop(void)
pr_warn("SMP: failed to stop secondary CPUs\n");
}

/* In case panic() and panic() called at the same time on CPU1 and CPU2,
* and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
* CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
* kdump fails. So split out the panic_smp_self_stop() and add
* set_cpu_online(smp_processor_id(), false).
*/
void panic_smp_self_stop(void)
{
pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
smp_processor_id());
set_cpu_online(smp_processor_id(), false);
while (1)
cpu_relax();
}

/*
* not supported here
*/
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11 changes: 6 additions & 5 deletions arch/arm/kvm/mmio.c
Expand Up @@ -117,6 +117,12 @@ int kvm_handle_mmio_return(struct kvm_vcpu *vcpu, struct kvm_run *run)
vcpu_set_reg(vcpu, vcpu->arch.mmio_decode.rt, data);
}

/*
* The MMIO instruction is emulated and should not be re-executed
* in the guest.
*/
kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));

return 0;
}

Expand Down Expand Up @@ -144,11 +150,6 @@ static int decode_hsr(struct kvm_vcpu *vcpu, bool *is_write, int *len)
vcpu->arch.mmio_decode.sign_extend = sign_extend;
vcpu->arch.mmio_decode.rt = rt;

/*
* The MMIO instruction is emulated and should not be re-executed
* in the guest.
*/
kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
return 0;
}

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6 changes: 3 additions & 3 deletions arch/arm/mach-omap2/omap_hwmod.c
Expand Up @@ -2551,7 +2551,7 @@ static int __init _init(struct omap_hwmod *oh, void *data)
* a stub; implementing this properly requires iclk autoidle usecounting in
* the clock code. No return value.
*/
static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
static void _setup_iclk_autoidle(struct omap_hwmod *oh)
{
struct omap_hwmod_ocp_if *os;
struct list_head *p;
Expand Down Expand Up @@ -2586,7 +2586,7 @@ static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
* reset. Returns 0 upon success or a negative error code upon
* failure.
*/
static int __init _setup_reset(struct omap_hwmod *oh)
static int _setup_reset(struct omap_hwmod *oh)
{
int r;

Expand Down Expand Up @@ -2647,7 +2647,7 @@ static int __init _setup_reset(struct omap_hwmod *oh)
*
* No return value.
*/
static void __init _setup_postsetup(struct omap_hwmod *oh)
static void _setup_postsetup(struct omap_hwmod *oh)
{
u8 postsetup_state;

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2 changes: 1 addition & 1 deletion arch/arm/mach-pxa/cm-x300.c
Expand Up @@ -547,7 +547,7 @@ static struct pxa3xx_u2d_platform_data cm_x300_u2d_platform_data = {
.exit = cm_x300_u2d_exit,
};

static void cm_x300_init_u2d(void)
static void __init cm_x300_init_u2d(void)
{
pxa3xx_set_u2d_info(&cm_x300_u2d_platform_data);
}
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2 changes: 1 addition & 1 deletion arch/arm/mach-pxa/littleton.c
Expand Up @@ -183,7 +183,7 @@ static struct pxafb_mach_info littleton_lcd_info = {
.lcd_conn = LCD_COLOR_TFT_16BPP,
};

static void littleton_init_lcd(void)
static void __init littleton_init_lcd(void)
{
pxa_set_fb_info(NULL, &littleton_lcd_info);
}
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2 changes: 1 addition & 1 deletion arch/arm/mach-pxa/zeus.c
Expand Up @@ -557,7 +557,7 @@ static struct pxaohci_platform_data zeus_ohci_platform_data = {
.flags = ENABLE_PORT_ALL | POWER_SENSE_LOW,
};

static void zeus_register_ohci(void)
static void __init zeus_register_ohci(void)
{
/* Port 2 is shared between host and client interface. */
UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
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1 change: 0 additions & 1 deletion arch/arm64/kernel/entry-ftrace.S
Expand Up @@ -78,7 +78,6 @@
.macro mcount_get_lr reg
ldr \reg, [x29]
ldr \reg, [\reg, #8]
mcount_adjust_addr \reg, \reg
.endm

.macro mcount_get_lr_addr reg
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2 changes: 1 addition & 1 deletion arch/mips/include/uapi/asm/inst.h
Expand Up @@ -361,8 +361,8 @@ enum mm_32a_minor_op {
mm_ext_op = 0x02c,
mm_pool32axf_op = 0x03c,
mm_srl32_op = 0x040,
mm_srlv32_op = 0x050,
mm_sra_op = 0x080,
mm_srlv32_op = 0x090,
mm_rotr_op = 0x0c0,
mm_lwxs_op = 0x118,
mm_addu32_op = 0x150,
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1 change: 1 addition & 0 deletions arch/mips/ralink/Kconfig
Expand Up @@ -38,6 +38,7 @@ choice

config SOC_MT7620
bool "MT7620/8"
select CPU_MIPSR2_IRQ_VI
select HW_HAS_PCI

config SOC_MT7621
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2 changes: 1 addition & 1 deletion arch/powerpc/include/asm/uaccess.h
Expand Up @@ -59,7 +59,7 @@
#endif

#define access_ok(type, addr, size) \
(__chk_user_ptr(addr), \
(__chk_user_ptr(addr), (void)(type), \
__access_ok((__force unsigned long)(addr), (size), get_fs()))

/*
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2 changes: 2 additions & 0 deletions arch/powerpc/platforms/pseries/dlpar.c
Expand Up @@ -288,6 +288,8 @@ int dlpar_detach_node(struct device_node *dn)
if (rc)
return rc;

of_node_put(dn);

return 0;
}

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9 changes: 8 additions & 1 deletion arch/um/include/asm/pgtable.h
Expand Up @@ -197,12 +197,17 @@ static inline pte_t pte_mkold(pte_t pte)

static inline pte_t pte_wrprotect(pte_t pte)
{
pte_clear_bits(pte, _PAGE_RW);
if (likely(pte_get_bits(pte, _PAGE_RW)))
pte_clear_bits(pte, _PAGE_RW);
else
return pte;
return(pte_mknewprot(pte));
}

static inline pte_t pte_mkread(pte_t pte)
{
if (unlikely(pte_get_bits(pte, _PAGE_USER)))
return pte;
pte_set_bits(pte, _PAGE_USER);
return(pte_mknewprot(pte));
}
Expand All @@ -221,6 +226,8 @@ static inline pte_t pte_mkyoung(pte_t pte)

static inline pte_t pte_mkwrite(pte_t pte)
{
if (unlikely(pte_get_bits(pte, _PAGE_RW)))
return pte;
pte_set_bits(pte, _PAGE_RW);
return(pte_mknewprot(pte));
}
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10 changes: 8 additions & 2 deletions arch/x86/events/intel/core.c
Expand Up @@ -3234,6 +3234,11 @@ static void free_excl_cntrs(int cpu)
}

static void intel_pmu_cpu_dying(int cpu)
{
fini_debug_store_on_cpu(cpu);
}

static void intel_pmu_cpu_dead(int cpu)
{
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
struct intel_shared_regs *pc;
Expand All @@ -3246,8 +3251,6 @@ static void intel_pmu_cpu_dying(int cpu)
}

free_excl_cntrs(cpu);

fini_debug_store_on_cpu(cpu);
}

static void intel_pmu_sched_task(struct perf_event_context *ctx,
Expand Down Expand Up @@ -3324,6 +3327,7 @@ static __initconst const struct x86_pmu core_pmu = {
.cpu_prepare = intel_pmu_cpu_prepare,
.cpu_starting = intel_pmu_cpu_starting,
.cpu_dying = intel_pmu_cpu_dying,
.cpu_dead = intel_pmu_cpu_dead,
};

static __initconst const struct x86_pmu intel_pmu = {
Expand Down Expand Up @@ -3359,6 +3363,8 @@ static __initconst const struct x86_pmu intel_pmu = {
.cpu_prepare = intel_pmu_cpu_prepare,
.cpu_starting = intel_pmu_cpu_starting,
.cpu_dying = intel_pmu_cpu_dying,
.cpu_dead = intel_pmu_cpu_dead,

.guest_get_msrs = intel_guest_get_msrs,
.sched_task = intel_pmu_sched_task,
};
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4 changes: 3 additions & 1 deletion arch/x86/events/intel/uncore_snbep.c
Expand Up @@ -1221,6 +1221,8 @@ static struct pci_driver snbep_uncore_pci_driver = {
.id_table = snbep_uncore_pci_ids,
};

#define NODE_ID_MASK 0x7

/*
* build pci bus to socket mapping
*/
Expand All @@ -1242,7 +1244,7 @@ static int snbep_pci2phy_map_init(int devid, int nodeid_loc, int idmap_loc, bool
err = pci_read_config_dword(ubox_dev, nodeid_loc, &config);
if (err)
break;
nodeid = config;
nodeid = config & NODE_ID_MASK;
/* get the Node ID mapping */
err = pci_read_config_dword(ubox_dev, idmap_loc, &config);
if (err)
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3 changes: 3 additions & 0 deletions arch/x86/include/asm/fpu/internal.h
Expand Up @@ -97,6 +97,9 @@ extern void fpstate_sanitize_xstate(struct fpu *fpu);
#define user_insn(insn, output, input...) \
({ \
int err; \
\
might_fault(); \
\
asm volatile(ASM_STAC "\n" \
"1:" #insn "\n\t" \
"2: " ASM_CLAC "\n" \
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1 change: 1 addition & 0 deletions arch/x86/kernel/cpu/mcheck/mce.c
Expand Up @@ -751,6 +751,7 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
quirk_no_way_out(i, m, regs);

if (mce_severity(m, mca_cfg.tolerant, &tmp, true) >= MCE_PANIC_SEVERITY) {
m->bank = i;
mce_read_aux(m, i);
*msg = tmp;
return 1;
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7 changes: 7 additions & 0 deletions arch/x86/kvm/svm.c
Expand Up @@ -5223,6 +5223,13 @@ static bool svm_cpu_has_accelerated_tpr(void)

static bool svm_has_emulated_msr(int index)
{
switch (index) {
case MSR_IA32_MCG_EXT_CTL:
return false;
default:
break;
}

return true;
}

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1 change: 1 addition & 0 deletions arch/x86/kvm/vmx.c
Expand Up @@ -7368,6 +7368,7 @@ static void free_nested(struct vcpu_vmx *vmx)
if (!vmx->nested.vmxon)
return;

hrtimer_cancel(&vmx->nested.preemption_timer);
vmx->nested.vmxon = false;
free_vpid(vmx->nested.vpid02);
nested_release_vmcs12(vmx);
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7 changes: 7 additions & 0 deletions arch/x86/kvm/x86.c
Expand Up @@ -4513,6 +4513,13 @@ int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
{
u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;

/*
* FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
* is returned, but our callers are not ready for that and they blindly
* call kvm_inject_page_fault. Ensure that they at least do not leak
* uninitialized kernel stack memory into cr2 and error code.
*/
memset(exception, 0, sizeof(*exception));
return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
exception);
}
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4 changes: 2 additions & 2 deletions arch/x86/pci/broadcom_bus.c
Expand Up @@ -50,8 +50,8 @@ static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
word1 = read_pci_config_16(bus, slot, func, 0xc0);
word2 = read_pci_config_16(bus, slot, func, 0xc2);
if (word1 != word2) {
res.start = (word1 << 16) | 0x0000;
res.end = (word2 << 16) | 0xffff;
res.start = ((resource_size_t) word1 << 16) | 0x0000;
res.end = ((resource_size_t) word2 << 16) | 0xffff;
res.flags = IORESOURCE_MEM;
update_res(info, res.start, res.end, res.flags, 0);
}
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4 changes: 3 additions & 1 deletion drivers/ata/sata_rcar.c
Expand Up @@ -872,7 +872,9 @@ static int sata_rcar_probe(struct platform_device *pdev)
int ret = 0;

irq = platform_get_irq(pdev, 0);
if (irq <= 0)
if (irq < 0)
return irq;
if (!irq)
return -EINVAL;

priv = devm_kzalloc(&pdev->dev, sizeof(struct sata_rcar_priv),
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15 changes: 8 additions & 7 deletions drivers/block/drbd/drbd_nl.c
Expand Up @@ -668,14 +668,15 @@ drbd_set_role(struct drbd_device *const device, enum drbd_role new_role, int for
if (rv == SS_TWO_PRIMARIES) {
/* Maybe the peer is detected as dead very soon...
retry at most once more in this case. */
int timeo;
rcu_read_lock();
nc = rcu_dereference(connection->net_conf);
timeo = nc ? (nc->ping_timeo + 1) * HZ / 10 : 1;
rcu_read_unlock();
schedule_timeout_interruptible(timeo);
if (try < max_tries)
if (try < max_tries) {
int timeo;
try = max_tries - 1;
rcu_read_lock();
nc = rcu_dereference(connection->net_conf);
timeo = nc ? (nc->ping_timeo + 1) * HZ / 10 : 1;
rcu_read_unlock();
schedule_timeout_interruptible(timeo);
}
continue;
}
if (rv < SS_SUCCESS) {
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