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change default risv-gcc to riscv-none-elf- and add _zicsr extension
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hathach committed May 15, 2024
1 parent b2a71b9 commit 4095ea6
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Showing 8 changed files with 43 additions and 29 deletions.
4 changes: 2 additions & 2 deletions examples/build_system/cmake/cpu/rv32i-ilp32.cmake
Original file line number Diff line number Diff line change
@@ -1,13 +1,13 @@
if (TOOLCHAIN STREQUAL "gcc")
set(TOOLCHAIN_COMMON_FLAGS
-march=rv32i
-march=rv32i_zicsr
-mabi=ilp32
)
set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")

elseif (TOOLCHAIN STREQUAL "clang")
set(TOOLCHAIN_COMMON_FLAGS
-march=rv32i
-march=rv32i_zicsr
-mabi=ilp32
)
set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")
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4 changes: 2 additions & 2 deletions examples/build_system/cmake/cpu/rv32imac-ilp32.cmake
Original file line number Diff line number Diff line change
@@ -1,13 +1,13 @@
if (TOOLCHAIN STREQUAL "gcc")
set(TOOLCHAIN_COMMON_FLAGS
-march=rv32imac
-march=rv32imac_zicsr
-mabi=ilp32
)
set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")

elseif (TOOLCHAIN STREQUAL "clang")
set(TOOLCHAIN_COMMON_FLAGS
-march=rv32imac
-march=rv32imac_zicsr
-mabi=ilp32
)
set(FREERTOS_PORT GCC_RISC_V CACHE INTERNAL "")
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19 changes: 14 additions & 5 deletions examples/build_system/cmake/toolchain/riscv_gcc.cmake
Original file line number Diff line number Diff line change
@@ -1,15 +1,24 @@
# default Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
if (NOT DEFINED CROSS_COMPILE)
set(CROSS_COMPILE "riscv-none-elf-")
endif ()

if (NOT DEFINED CMAKE_C_COMPILER)
set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
endif ()

if (NOT DEFINED CMAKE_C_COMPILER)
set(CMAKE_C_COMPILER "riscv-none-embed-gcc")
set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
endif ()

if (NOT DEFINED CMAKE_CXX_COMPILER)
set(CMAKE_CXX_COMPILER "riscv-none-embed-g++")
set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++)
endif ()

set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
set(CMAKE_SIZE "riscv-none-embed-size" CACHE FILEPATH "")
set(CMAKE_OBJCOPY "riscv-none-embed-objcopy" CACHE FILEPATH "")
set(CMAKE_OBJDUMP "riscv-none-embed-objdump" CACHE FILEPATH "")
set(CMAKE_SIZE ${CROSS_COMPILE}size CACHE FILEPATH "")
set(CMAKE_OBJCOPY ${CROSS_COMPILE}objcopy CACHE FILEPATH "")
set(CMAKE_OBJDUMP ${CROSS_COMPILE}objdump CACHE FILEPATH "")

include(${CMAKE_CURRENT_LIST_DIR}/common.cmake)

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11 changes: 7 additions & 4 deletions examples/build_system/make/cpu/rv32i-ilp32.mk
Original file line number Diff line number Diff line change
@@ -1,12 +1,15 @@
ifeq ($(TOOLCHAIN),gcc)
CFLAGS += \
-march=rv32i \
-march=rv32i_zicsr \
-mabi=ilp32 \

else ifeq ($(TOOLCHAIN),iar)
#CFLAGS += --cpu cortex-a53
#ASFLAGS += --cpu cortex-a53
else ifeq ($(TOOLCHAIN),clang)
CFLAGS += \
-march=rv32i_zicsr \
-mabi=ilp32 \

else ifeq ($(TOOLCHAIN),iar)
$(error not support)
endif

# For freeRTOS port source
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10 changes: 7 additions & 3 deletions examples/build_system/make/cpu/rv32imac-ilp32.mk
Original file line number Diff line number Diff line change
@@ -1,11 +1,15 @@
ifeq ($(TOOLCHAIN),gcc)
CFLAGS += \
-march=rv32imac \
-march=rv32imac_zicsr \
-mabi=ilp32 \

else ifeq ($(TOOLCHAIN),clang)
CFLAGS += \
-march=rv32imac_zicsr \
-mabi=ilp32 \

else ifeq ($(TOOLCHAIN),iar)
#CFLAGS += --cpu cortex-a53
#ASFLAGS += --cpu cortex-a53
$(error not support)

endif

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9 changes: 7 additions & 2 deletions hw/bsp/ch32v20x/family.mk
Original file line number Diff line number Diff line change
@@ -1,3 +1,9 @@
# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable
#CROSS_COMPILE ?= riscv32-unknown-elf-

# Toolchain from https://nucleisys.com/download.php
#CROSS_COMPILE ?= riscv-nuclei-elf-

# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
CROSS_COMPILE ?= riscv-none-elf-

Expand All @@ -9,10 +15,9 @@ DEPS_SUBMODULES += $(CH32V20X_SDK)
CH32V20X_SDK_SRC = $(CH32V20X_SDK)/EVT/EXAM/SRC

include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= rv32imac-ilp32

CFLAGS += \
-march=rv32imac_zicsr \
-mabi=ilp32 \
-mcmodel=medany \
-ffunction-sections \
-fdata-sections \
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8 changes: 3 additions & 5 deletions hw/bsp/ch32v307/family.mk
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable
#CROSS_COMPILE ?= riscv32-unknown-elf-

# Toolchain from https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack
CROSS_COMPILE ?= riscv-none-embed-
# Toolchain from https://nucleisys.com/download.php
#CROSS_COMPILE ?= riscv-nuclei-elf-

# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
#CROSS_COMPILE ?= riscv-none-elf-
CROSS_COMPILE ?= riscv-none-elf-

# Submodules
CH32V307_SDK = hw/mcu/wch/ch32v307
Expand All @@ -16,8 +16,6 @@ CH32V307_SDK_SRC = $(CH32V307_SDK)/EVT/EXAM/SRC
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= rv32imac-ilp32

# -march=rv32imac_zicsr

CFLAGS += \
-flto \
-msmall-data-limit=8 \
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7 changes: 1 addition & 6 deletions hw/bsp/gd32vf103/family.mk
Original file line number Diff line number Diff line change
Expand Up @@ -4,11 +4,8 @@
# Toolchain from https://nucleisys.com/download.php
#CROSS_COMPILE ?= riscv-nuclei-elf-

# Toolchain from https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack
CROSS_COMPILE ?= riscv-none-embed-

# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
# CROSS_COMPILE ?= riscv-none-elf-
CROSS_COMPILE ?= riscv-none-elf-

# Submodules
NUCLEI_SDK = hw/mcu/gd/nuclei-sdk
Expand All @@ -22,8 +19,6 @@ STARTUP_ASM = $(GD32VF103_SDK_SOC)/Common/Source/GCC
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= rv32imac-ilp32

# -march=rv32imac_zicsr

CFLAGS += \
-mcmodel=medlow \
-mstrict-align \
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