Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

pic32 sanity fixes #1451

Merged
merged 3 commits into from May 24, 2022
Merged

pic32 sanity fixes #1451

merged 3 commits into from May 24, 2022

Commits on May 1, 2022

  1. Add TU_BREAKPOINT for mips architecture 

    _mips is provided by xc32-gcc
    @kasjer
    kasjer committed May 1, 2022
    Copy the full SHA
    d51743a View commit details
    Browse the repository at this point in the history

  2. dcd_pic32: Add asserts transfer sanity check 

    TU_ASSERTS added to detect transfer inconsistency.
    @kasjer
    kasjer committed May 1, 2022
    Copy the full SHA
    c145777 View commit details
    Browse the repository at this point in the history

  3. dcd_pic32: Fix memory overwrite in incoming data 

    When transfer was finished rx_fifo_read() read all that
was to read RXPKTRDY was cleared allowing next packet to
be received.
Then xfer_complete was called.
Interrupt for OUT endpoint was left enable, that would not
be a problem if data was handled fast and new transfer was
scheduled.
For MSC when host sends a lot of data this interrupt that was
enabled could cause epn_handle_rx_int() to be called after
transfer was completed and next was not scheduled yet.
Without TU_ASSERT that was added to detect this, incoming
data was written past buffer provided by user code resulting
in random memory corruption.

This just blocks RX interrupt when transfer is finished,
and also only unmasked rx interrupts are handled.
    @kasjer
    kasjer committed May 1, 2022
    Copy the full SHA
    e49cad8 View commit details
    Browse the repository at this point in the history