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Flush the dcd data on reset #1953

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merged 1 commit into from Mar 14, 2023
Merged

Flush the dcd data on reset #1953

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4 changes: 4 additions & 0 deletions src/portable/chipidea/ci_hs/dcd_ci_hs.c
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Expand Up @@ -48,6 +48,8 @@

#define CI_HS_REG(_port) ((ci_hs_regs_t*) _ci_controller[_port].reg_base)

// Clean means to push any cached changes to RAM and invalidate "removes" the
// entry from the cache.
#if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1
#define CleanInvalidateDCache_by_Addr SCB_CleanInvalidateDCache_by_Addr
#else
Expand Down Expand Up @@ -199,6 +201,8 @@ static void bus_reset(uint8_t rhport)
_dcd_data.qhd[0][0].qtd_overlay.next = _dcd_data.qhd[0][1].qtd_overlay.next = QTD_NEXT_INVALID;

_dcd_data.qhd[0][0].int_on_setup = 1; // OUT only

CleanInvalidateDCache_by_Addr((uint32_t*) &_dcd_data, sizeof(dcd_data_t));
}

void dcd_init(uint8_t rhport)
Expand Down