Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Balanced gray codes #1

Open
sameer opened this issue May 23, 2020 · 1 comment
Open

Balanced gray codes #1

sameer opened this issue May 23, 2020 · 1 comment
Labels
help wanted Extra attention is needed

Comments

@sameer
Copy link
Member

sameer commented May 23, 2020

There are methods to produce balanced gray codes: gray codes where the transitions of each bit are evenly distributed across the mapping.

Wikipedia entry describes it better in more concrete mathematical terms.

One algorithm I thought of:

  • Generate a gray code hypercube -- a graph where each vertex is a binary code, and it is connected to all vertices which are 1 bit different (i.e. for bit width of 4, there are 4 adjacent vertices to 0: 1, 2, 4, 8)
  • Find hamiltonian cycles in the graph
  • Check hamiltonian cycles for balance, pick the first balanced one

I read some papers about it, but I don't have an algorithm that would be simple enough to implement in SystemVerilog.

@sameer sameer added the help wanted Extra attention is needed label May 23, 2020
@Butterwell
Copy link

Butterwell commented Oct 7, 2022

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
help wanted Extra attention is needed
Projects
None yet
Development

No branches or pull requests

2 participants