Add gen_reg_rtx_complex_concat_p target hook

Allow SCmode in XMM registers.

gcc/config/i386/i386.c

@@ -7927,9 +7927,8 @@ construct_container (machine_mode mode, machine_mode orig_mode,
 	  return NULL;
 	}
 
-  /* First construct simple cases.  Avoid SCmode, since we want to use
-     single register to pass this type.  */
-  if (n == 1 && mode != SCmode)
+  /* First construct simple cases.  */
+  if (n == 1)
     switch (regclass[0])
       {
       case X86_64_INTEGER_CLASS:
@@ -40127,6 +40126,10 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
 		&& VALID_MASK_AVX512BW_MODE (mode)));
   if (SSE_REGNO_P (regno))
     {
+      /* Allow SCmode in SSE registers for 64-bit mode.  */
+      if (mode == SCmode && TARGET_64BIT && TARGET_SSE)
+	return true;
+
       /* We implement the move patterns for all vector modes into and
 	 out of SSE registers, even when no operation instructions
 	 are available.  */
@@ -44136,6 +44139,16 @@ ix86_expand_reduc (rtx (*fn) (rtx, rtx, rtx), rtx dest, rtx in)
     }
 }
 
+/* Target hook for gen_reg_rtx_complex_concat_p.  */
+
+static bool
+ix86_gen_reg_rtx_complex_concat_p (machine_mode mode)
+{
+  if (mode == SCmode && TARGET_64BIT && TARGET_SSE)
+    return false;
+  return default_gen_reg_rtx_complex_concat_p (mode);
+}
+
 /* Target hook for scalar_mode_supported_p.  */
 static bool
 ix86_scalar_mode_supported_p (scalar_mode mode)
@@ -51655,6 +51668,10 @@ ix86_run_selftests (void)
 #undef TARGET_GIMPLIFY_VA_ARG_EXPR
 #define TARGET_GIMPLIFY_VA_ARG_EXPR ix86_gimplify_va_arg
 
+#undef TARGET_GEN_REG_RTX_COMPLEX_CONCAT_P
+#define TARGET_GEN_REG_RTX_COMPLEX_CONCAT_P \
+  ix86_gen_reg_rtx_complex_concat_p
+
 #undef TARGET_SCALAR_MODE_SUPPORTED_P
 #define TARGET_SCALAR_MODE_SUPPORTED_P ix86_scalar_mode_supported_p
 

gcc/config/i386/i386.md

@@ -458,7 +458,7 @@
 
 ;; Main data type used by the insn
 (define_attr "mode"
-  "unknown,none,QI,HI,SI,DI,TI,OI,XI,SF,DF,XF,TF,V16SF,V8SF,V4DF,V4SF,
+  "unknown,none,QI,HI,SI,DI,TI,OI,XI,SF,DF,XF,TF,SC,V16SF,V8SF,V4DF,V4SF,
   V2DF,V2SF,V1DF,V8DF"
   (const_string "unknown"))
 
@@ -3786,6 +3786,75 @@
 }
   [(set_attr "type" "fxch")
    (set_attr "mode" "XF")])
+
+(define_expand "movsc"
+  [(set (match_operand:SC 0 "nonimmediate_operand")
+	(match_operand:SC 1 "general_operand"))]
+  "TARGET_64BIT && TARGET_SSE"
+  "ix86_expand_move (SCmode, operands); DONE;")
+
+(define_insn "*movsc_internal"
+ [(set (match_operand:SC 0 "nonimmediate_operand"
+	 "=?r,?m,v,v,v,m,?r,?v,r  ,m")
+       (match_operand:SC 1 "general_operand"
+	 "rmF,rF,C,v,m,v,v ,r ,rmF,rF"))]
+ "TARGET_64BIT
+  && TARGET_SSE
+  && !(MEM_P (operands[0]) && MEM_P (operands[1]))
+  && (lra_in_progress
+      || reload_completed
+      || !CONST_DOUBLE_P (operands[1])
+      || standard_sse_constant_p (operands[1], SCmode) == 1
+      || memory_operand (operands[0], SCmode))"
+{
+  switch (get_attr_type (insn))
+    {
+    case TYPE_IMOV:
+      return "mov{q}\t{%1, %0|%0, %1}";
+
+    case TYPE_SSELOG1:
+      return standard_sse_constant_opcode (insn, operands);
+
+    case TYPE_SSEMOV:
+      switch (get_attr_mode (insn))
+	{
+	case MODE_SC:
+	  if (REG_P (operands[0]) && REG_P (operands[1]))
+	    return "vmovsd\t{%d1, %0|%0, %d1}";
+	  return "vmovsd\t{%1, %0|%0, %1}";
+
+	case MODE_DI:
+	  return "mov{q}\t{%1, %0|%0, %1}";
+
+	default:
+	  gcc_unreachable ();
+	}
+
+    default:
+      gcc_unreachable ();
+    }
+}
+  [(set (attr "type")
+	(cond [(eq_attr "alternative" "0,1,8,9")
+		 (const_string "imov")
+	       (eq_attr "alternative" "2")
+		 (const_string "sselog1")
+	      ]
+	      (const_string "ssemov")))
+   (set (attr "prefix")
+	(cond [(eq_attr "alternative" "0,1,8,9")
+		 (const_string "orig")
+	       (eq_attr "alternative" "2")
+		 (const_string "maybe_evex")
+	      ]
+	      (const_string "evex")))
+   (set (attr "mode")
+	(cond [(eq_attr "alternative" "0,1,6,7,8,9")
+		 (const_string "DI")
+	       (eq_attr "alternative" "2")
+		 (const_string "V4SF")
+	      ]
+	      (const_string "SC")))])
 
 
 ;; Zero extension instructions

gcc/doc/tm.texi

@@ -4283,6 +4283,11 @@ translate machine_mode @var{mode} to another mode.  For example, rs6000's
 The default version of the hook returns that mode that was passed in.
 @end deftypefn
 
+@deftypefn {Target Hook} bool TARGET_GEN_REG_RTX_COMPLEX_CONCAT_P (machine_mode @var{mode})
+Define this to return nonzero if a @code{concat} two pseudos
+should be used when generating complex @var{mode} @code{reg} RTX.
+@end deftypefn
+
 @deftypefn {Target Hook} bool TARGET_SCALAR_MODE_SUPPORTED_P (scalar_mode @var{mode})
 Define this to return nonzero if the port is prepared to handle
 insns involving scalar mode @var{mode}.  For a scalar mode to be

gcc/doc/tm.texi.in

@@ -3352,6 +3352,8 @@ stack.
 
 @hook TARGET_TRANSLATE_MODE_ATTRIBUTE
 
+@hook TARGET_GEN_REG_RTX_COMPLEX_CONCAT_P
+
 @hook TARGET_SCALAR_MODE_SUPPORTED_P
 
 @hook TARGET_VECTOR_MODE_SUPPORTED_P

gcc/emit-rtl.c

@@ -1166,7 +1166,7 @@ gen_reg_rtx (machine_mode mode)
 	crtl->stack_alignment_estimated = min_align;
     }
 
-  if (generating_concat_p
+  if (targetm.gen_reg_rtx_complex_concat_p (mode)
       && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
 	  || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
     {

gcc/target.def

@@ -3332,6 +3332,15 @@ The default version of the hook returns that mode that was passed in.",
  machine_mode, (machine_mode mode),
  default_translate_mode_attribute)
 
+/* True if a CONCAT of two pseudos should be used when generating
+   complex MODE REG rtx for the target.  */
+DEFHOOK
+(gen_reg_rtx_complex_concat_p,
+ "Define this to return nonzero if a @code{concat} two pseudos\n\
+should be used when generating complex @var{mode} @code{reg} RTX.",
+ bool, (machine_mode mode),
+ default_gen_reg_rtx_complex_concat_p)
+
 /* True if MODE is valid for the target.  By "valid", we mean able to
    be manipulated in non-trivial ways.  In particular, this means all
    the arithmetic is supported.  */

gcc/targhooks.c

@@ -401,6 +401,14 @@ default_translate_mode_attribute (machine_mode mode)
   return mode;
 }
 
+/* The default implementation of TARGET_GEN_REG_RTX_COMPLEX_CONCAT_P.  */
+
+bool
+default_gen_reg_rtx_complex_concat_p (machine_mode)
+{
+  return generating_concat_p;
+}
+
 /* True if MODE is valid for the target.  By "valid", we mean able to
    be manipulated in non-trivial ways.  In particular, this means all
    the arithmetic is supported.

gcc/targhooks.h

@@ -73,6 +73,7 @@ extern bool default_print_operand_punct_valid_p (unsigned char);
 extern tree default_mangle_assembler_name (const char *);
 
 extern machine_mode default_translate_mode_attribute (machine_mode);
+extern bool default_gen_reg_rtx_complex_concat_p (machine_mode);
 extern bool default_scalar_mode_supported_p (scalar_mode);
 extern bool default_libgcc_floating_mode_supported_p (scalar_float_mode);
 extern opt_scalar_float_mode default_floatn_mode (int, bool);