GitHub - hoglet67/65c02_errata: A very, very preliminary experiment with a soft 65c02 core.

Name		Name	Last commit message	Last commit date
Latest commit History 55 Commits
6551-ACIA-Verilog		6551-ACIA-Verilog
6551-ACIA		6551-ACIA
peripheral		peripheral
simulation/iverilog		simulation/iverilog
targets		targets
.gitignore		.gitignore
ALU.v		ALU.v
Arty-S7-50-Master.xdc		Arty-S7-50-Master.xdc
R65Cx2.vhd		R65Cx2.vhd
cpu_65c02.v		cpu_65c02.v
dave_gamma.zip		dave_gamma.zip
debounce.v		debounce.v
drc_1.rpx		drc_1.rpx
generic_ram.v		generic_ram.v
m6522.v		m6522.v
rtest_hex.txt		rtest_hex.txt
t65_beta.bin		t65_beta.bin
t65_beta_done.zip		t65_beta_done.zip
top.sv		top.sv
top.v		top.v