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Add testbed for NTSC artifact decoding
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@IanSB
IanSB committed Jan 15, 2022
1 parent d29fa47 commit 1a962ab
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Showing 9 changed files with 449 additions and 3 deletions.
1 change: 1 addition & 0 deletions src/CMakeLists.txt
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Expand Up @@ -79,6 +79,7 @@ file( GLOB core_files
capture_line_ntsc_8bpp.S
capture_line_atariXL_8bpp.S
capture_line_fast_simple_16bpp.S
vid_cga_comp.c
defs.h
arm-exception.c
cache.c
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74 changes: 73 additions & 1 deletion src/capture_line_ntsc_8bpp.S
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Expand Up @@ -564,6 +564,7 @@ full_done_non_white\@:
.global capture_line_ntsc_8bpp_cga
.global capture_line_ntsc_8bpp_mono
.global capture_line_ntsc_sixbits_8bpp_cga
.global capture_line_ntsc_sixbits_16bpp_cga
.global capture_line_ntsc_sixbits_8bpp_mono
.global capture_line_ntsc_sixbits_8bpp_mono_auto
.global capture_line_ntsc_sixbits_double_8bpp_mono
Expand Down Expand Up @@ -845,6 +846,7 @@ bit_count:

.align 6
b preload_capture_line_ntsc_sixbits_8bpp_cga

capture_line_ntsc_sixbits_8bpp_cga:
push {lr}
ldr r12, =ntsc_status
Expand Down Expand Up @@ -1437,4 +1439,74 @@ loop_8bppd_auto:
bne loop_8bppd_auto
pop {r0, pc}

.ltorg
.ltorg


.macro CAPTURE_SIX_BITS_16BPP_LO reg
// Pixel 0 in GPIO 7.. 2 -> 7.. 0
// Pixel 1 in GPIO 13.. 8 -> 15.. 8

and r9, r8, #(0x3f << PIXEL_BASE)
orr r9, r9, r9, lsl #6
eor r10, \reg, r9, lsr #(PIXEL_BASE)
ldr r12, [r0]
.endm

.macro CAPTURE_SIX_BITS_16BPP_HI reg
// Pixel 2 in GPIO 7.. 2 -> 23..16
// Pixel 3 in GPIO 13.. 8 -> 31..24

and r9, r8, #(0x3f << (PIXEL_BASE + 6))
orr r9, r9, r9, lsr #6
eor \reg, r10, r9, lsl #(16 - PIXEL_BASE)
// ldr r12, [r0, #64]
.endm
.align 6
// *** 16 bit ***
b preload_capture_line_default_twelvebits_16bpp
capture_line_ntsc_sixbits_16bpp_cga:
push {lr}
SETUP_VSYNC_DEBUG_16BPP_R11
SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
mov r1, r1, lsr #2
SETUP_TWELVE_BITS_MASK_R14
loop_16bpp:
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_SIX_BITS_16BPP_LO r11 // input in r8
// WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_SIX_BITS_16BPP_HI r5 // input in r8
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_SIX_BITS_16BPP_LO r11 // input in r8
// WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_SIX_BITS_16BPP_HI r6 // input in r8

WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_SIX_BITS_16BPP_LO r11 // input in r8
// WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_SIX_BITS_16BPP_HI r7 // input in r8
WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_SIX_BITS_16BPP_LO r11 // input in r8
// WAIT_FOR_PSYNC_EDGE_FAST // expects GPLEV0 in r4, result in r8
CAPTURE_SIX_BITS_16BPP_HI r10 // input in r8

WRITE_R5_R6_R7_R10_16BPP

subs r1, r1, #1
bne loop_16bpp

pop {r0, pc}

preload_capture_line_default_twelvebits_16bpp:
SETUP_DUMMY_PARAMETERS
b capture_line_ntsc_sixbits_16bpp_cga


.ltorg








3 changes: 3 additions & 0 deletions src/defs.h
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Expand Up @@ -564,3 +564,6 @@ typedef struct {
#define HIGH_LATENCY_FLAG 0x00004000
#define OLD_FIRMWARE_FLAG 0x00002000
#endif

#define Bit32u uint32_t
#define Bit8u uint8_t
2 changes: 1 addition & 1 deletion src/geometry.c
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Expand Up @@ -457,7 +457,7 @@ void geometry_get_fb_params(capture_info_t *capinfo) {
capinfo->bpp = 4; //force 4bpp for teletext
} else if (capinfo->sample_width >= SAMPLE_WIDTH_9LO && capinfo->bpp == 4) {
capinfo->bpp = 8; //force at least 8bpp in 12 bit modes as no capture loops for capture into 4bpp buffer
} else if (capinfo->sample_width == SAMPLE_WIDTH_6 && capinfo->bpp != 8) {
} else if (capinfo->sample_width == SAMPLE_WIDTH_6 && capinfo->bpp < 8) {
capinfo->bpp = 8; //force 8bpp in 6 bit modes as no capture loops for 6 bit capture into 4 or 16 bpp buffer
} else if (capinfo->sample_width <= SAMPLE_WIDTH_3 && capinfo->bpp > 8) {
capinfo->bpp = 8; //force 8bpp in 1 & 3 bit modes as no capture loops for 1 or 3 bit capture into 16bpp buffer
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10 changes: 9 additions & 1 deletion src/rgb_to_fb.S
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Expand Up @@ -32,6 +32,7 @@
.global last_sync_detected
.global last_but_one_sync_detected
.global delay_in_arm_cycles
.global get_cycle_counter
.global benchmarkRAM
.global jitter_offset
.global debug_value
Expand Down Expand Up @@ -2195,6 +2196,13 @@ delay_loop:
blt delay_loop
pop {pc}

get_cycle_counter:
push {r3, lr}
bl set_hardware_id_r3
READ_CYCLE_COUNTER r0
pop {r3, pc}


benchmarkRAM:
push {r1-r12, lr}
mov r3, #0
Expand Down Expand Up @@ -2413,7 +2421,7 @@ capture_line_normal_6bpp_table:
.word capture_line_default_sixbits_8bpp
.word capture_line_default_sixbits_16bpp // placeholder inband
.word capture_line_default_sixbits_8bpp // placeholder inband
.word capture_line_default_sixbits_16bpp
.word capture_line_ntsc_sixbits_16bpp_cga
.word capture_line_ntsc_sixbits_8bpp_cga
.word capture_line_default_sixbits_16bpp
.word capture_line_ntsc_sixbits_8bpp_mono
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2 changes: 2 additions & 0 deletions src/rgb_to_fb.h
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Expand Up @@ -21,6 +21,8 @@ extern int clear_menu_bits();

extern int measure_n_lines(int n);

extern int get_cycle_counter();

extern int sw1counter;

extern int sw2counter;
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13 changes: 13 additions & 0 deletions src/rgb_to_hdmi.c
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Expand Up @@ -25,6 +25,7 @@
#include "filesystem.h"
#include "rgb_to_fb.h"
#include "jtag/update_cpld.h"
#include "vid_cga_comp.h"
#include "videocore.c"


Expand Down Expand Up @@ -3349,6 +3350,18 @@ void rgb_to_hdmi_main() {
log_info("ARM: GPIO read = %dns, MBOX read = %dns, Triple MBOX read = %dns (%dns/word)", (int)((double) benchmarkRAM(3) * 1000 / cpuspeed / 100000 + 0.5), (int)((double) benchmarkRAM(4) * 1000 / cpuspeed / 100000 + 0.5), triple, triple / 3);
log_info("GPU: GPIO read = %dns, MBOX write = %dns", (int)((double) benchmarkRAM(1) * 1000 / cpuspeed / 100000 + 0.5), (int)((double) benchmarkRAM(2) * 1000 / cpuspeed / 100000 + 0.5));
log_info("RAM: Cached read = %dns, Uncached screen read = %dns", (int)((double) benchmarkRAM(0x2000000) * 1000 / cpuspeed / 100000 + 0.5), (int)((double) benchmarkRAM((int)capinfo->fb) * 1000 / cpuspeed / 100000 + 0.5));


//***********test CGA artifact decode*********************
int startcycle = get_cycle_counter();
cga_comp_init(0);
Bit32u pixels[1024];
for(int i=0; i<1024;i++) pixels[i] = i & 0x0f; //put some 4 bit pixel data in the pixel words
Composite_Process(0, 720/4, pixels); //720 pixels to include some border
int duration = abs(get_cycle_counter() - startcycle);
log_info("CGA 720 pixel artifact decode: = %dns", duration);
//***********end of test CGA artifact decode***************


if (cpld_fail_state == CPLD_MANUAL) {
rgb_to_fb(capinfo, extra_flags() | BIT_PROBE); // dummy mode7 probe to setup parms from capinfo
Expand Down

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