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Add FFOSD support in 12 bit CPLD mode
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IanSB committed Apr 17, 2021
1 parent f512e87 commit 3313630
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Showing 3 changed files with 14 additions and 2 deletions.
3 changes: 3 additions & 0 deletions src/jtag/update_cpld.c
Expand Up @@ -54,6 +54,7 @@ int update_cpld(char *path) {
}

close_filesystem();
RPI_SetGpioPinFunction(MUX_PIN, FS_OUTPUT);

log_info("Read xsvf file %s (length = %d)", path, xsvf_info.fsize);
log_info("Programming....");
Expand All @@ -63,6 +64,8 @@ int update_cpld(char *path) {
int xsvf_ret = xsvfExecute();
RPI_SetGpioPinFunction(TDO_PIN, FS_OUTPUT);

RPI_SetGpioPinFunction(MUX_PIN, FS_INPUT);

if (xsvf_ret != XSVF_ERROR_NONE) {
sprintf(message, "Failed, error = %d", xsvf_ret);
log_info(message);
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10 changes: 10 additions & 0 deletions src/macros.S
Expand Up @@ -798,12 +798,22 @@ wait_wr\@:
// Pixel in GPIO 13.. 2 -> 15.. 0
and r9, r8, r14
eor r10, \reg, r9, lsr #(PIXEL_BASE)

tst r8, #MUX_MASK
orrne r10, #0xff00
orrne r3, #BIT_PROBE
orrne r10, #0x00ff
.endm

.macro CAPTURE_TWELVE_BITS_16BPP_HI reg
// Pixel in GPIO 13.. 2 -> 31.. 16
and r9, r8, r14
eor \reg, r10, r9, lsl #(16 - PIXEL_BASE)

tst r8, #MUX_MASK
orrne \reg, \reg, #(0xff000000)
orrne r3, #BIT_PROBE
orrne \reg, \reg, #(0x00ff0000)
.endm

.macro CAPTURE_TWELVE_BITS_DOUBLE_16BPP reg reg2
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3 changes: 1 addition & 2 deletions src/rgb_to_hdmi.c
Expand Up @@ -1459,6 +1459,7 @@ static void init_hardware() {
RPI_SetGpioPinFunction(STROBE_PIN, FS_INPUT);
RPI_SetGpioPinFunction(SP_DATA_PIN, FS_INPUT);
RPI_SetGpioPinFunction(SP_CLKEN_PIN, FS_INPUT);
RPI_SetGpioPinFunction(MUX_PIN, FS_INPUT);
for (i = 0; i < 12; i++) {
RPI_SetGpioPinFunction(PIXEL_BASE + i, FS_INPUT);
}
Expand Down Expand Up @@ -1487,9 +1488,7 @@ static void init_hardware() {

if (!version_state) {
simple_detected = 1;
RPI_SetGpioPinFunction(MUX_PIN, FS_INPUT);
} else {
RPI_SetGpioPinFunction(MUX_PIN, FS_OUTPUT);
if (RPI_GetGpioValue(STROBE_PIN) == 1) { // if high then must be V4, if low then could be (V1-3) or V5
newanalog = 1;
} else {
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