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Add pl and mi conditional codes #355

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dlrobertson
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@dlrobertson dlrobertson commented Oct 16, 2018

Add the pl and mi conditional codes to Aarch64 branch logic

How Has This Been Tested?

Architecture Yes/No Comments
x86-32 ✖️
x86-64 ✖️
ARM ✖️
AARCH64 ✔️
MIPS ✖️
POWERPC ✖️
SPARC ✖️
make tests ✖️

@Grazfather
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Looks like we have a few flags wrong: ge, gt, lt, lte.

Could you please fix them all?

@Grazfather
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They aren't actually wrong, they just called overflow O when it's usually called V. I'll fix it.

elif mnemo.endswith("mi"):
taken, reason = val&(1<<flags["negative"]), "N"
elif mnemo.endswith("pl"):
taken, reason = not val&(1<<flags["negative"]), "N==O"
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You mean N==0, not N==O. Plus we have been putting !Z, so we should be consistent.

@Grazfather
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Take a look at #360, I think this knocks them all out. Care to test?

@Grazfather
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Look at #361.

@Grazfather Grazfather closed this Oct 18, 2018
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2 participants