Add more tests for print, println, print_reg ops

test/test_op/test_debug_ops.py

@@ -8,16 +8,34 @@ def vm():
     return VirtualMachine()
 
 
+def test_exec_print_reg(vm, capsys):
+    vm.registers[1] = 70
+
+    vm.exec_print_reg("R1")
+
+    assert capsys.readouterr().out == "R1 = 0x0046 = 70 = 'F'\n"
+
+
 def test_print_reg_increments_pc(vm):
     vm.exec_print_reg("R1")
     assert vm.pc == 1
 
 
+def test_exec_print(vm, capsys):
+    vm.exec_print("Hello, world!")
+    assert capsys.readouterr().out == "Hello, world!"
+
+
 def test_print_increments_pc(vm):
     vm.exec_print("Hello, world!")
     assert vm.pc == 1
 
 
+def test_exec_println(vm, capsys):
+    vm.exec_println("Hello, world!")
+    assert capsys.readouterr().out == "Hello, world!\n"
+
+
 def test_println_increments_pc(vm):
     vm.exec_println("Hello, world!")
     assert vm.pc == 1

test/test_op/test_shift.py

@@ -1,5 +1,6 @@
 import pytest
 
+from hera.data import Op
 from hera.utils import to_u16
 from hera.vm import VirtualMachine
 
@@ -9,6 +10,17 @@ def vm():
     return VirtualMachine()
 
 
+def test_exec_aslu_op_with_LSL(vm):
+    vm.registers[2] = 40
+
+    vm.exec_one(Op("LSL", ["R1", "R2"]))
+
+    assert vm.pc == 1
+    assert vm.registers[1] == 80
+    assert not vm.flag_sign
+    assert not vm.flag_zero
+
+
 def test_calculate_LSL_with_small_positive(vm):
     assert vm.calculate_LSL(7) == 14