__builtin_prefetch leads to assembler error #16

fxcoudert · 2020-08-31T12:06:11Z

gcc.c-torture/execute/builtin-prefetch-2.c leads to invalid asm at -O1 and higher:

/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:61:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [sp, 12]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:76:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [sp, 12]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:97:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [x0, 4]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:118:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [x1, 12]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:127:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [x1, 20]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:142:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [sp, 4]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:143:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [sp, 4]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:156:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [sp, 36]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:157:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [sp, 36]
                                ^
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccf3LMJR.s:159:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [sp, 44]
                                ^

Reduced test case:

$ cat builtin-prefetch-2.c          
void simple_local ()
{
  int ix;
  __builtin_prefetch (&ix, 0, 0);
}
$ ./bin/gcc builtin-prefetch-2.c -O0 -c
$ ./bin/gcc builtin-prefetch-2.c -O1 -c
/var/folders/5b/7mrgq6j55b51p7ztj1r3gv400000gq/T//ccvNKA1p.s:10:23: error: index must be a multiple of 8 in range [0, 32760].
        prfm    PLDL1STRM, [sp, 12]
                                ^

The text was updated successfully, but these errors were encountered:

fxcoudert · 2020-08-31T12:25:12Z

GCC assembly at -O1:

_simple_local:
LFB0:
        .cfi_startproc
        sub     sp, sp, #16
        .cfi_def_cfa_offset 16
        prfm    PLDL1STRM, [sp, 12]
        add     sp, sp, 16
        .cfi_def_cfa_offset 0
        ret
        .cfi_endproc

At -O0:

_simple_local:
LFB0:
        .cfi_startproc
        sub     sp, sp, #16
        .cfi_def_cfa_offset 16
        add     x0, sp, 12
        prfm    PLDL1STRM, [x0]
        nop
        add     sp, sp, 16
        .cfi_def_cfa_offset 0
        ret
        .cfi_endproc

Clang assembly at -O0 (and same at -O1):

_simple_local:                          ; @simple_local
        .cfi_startproc
; %bb.0:
        sub     sp, sp, #16             ; =16
        .cfi_def_cfa_offset 16
        prfum   pldl1strm, [sp, #12]
        add     sp, sp, #16             ; =16
        ret
        .cfi_endproc

fxcoudert · 2020-08-31T12:31:06Z

So clang is generating prfum instead of prfm.

iains · 2020-08-31T12:35:55Z

yeah, will have to read the ISA manual and figure out how to detect the case it's needed. At first look this is occurring because Arm64 Darwin can have items on the stack which are less aligned than 8bytes ( this is the packing rule for smaller objects which are passed on the stack - and which changes to a different rule for variadic ;) fun, fun, fun ...)

darwinpcs, packs some stack items, which means that one cannot guarantee that they are aligned to DI. Check for these cases and reject PRFM instructions then. Note, that this generally results in use of an extra temporary reg. clang uses 'PRFUM' instructions in those cases, so we have a missed optimisation opportunity (low priority). fixes issue #16.

iains · 2020-09-03T19:31:56Z

should be fixed.

darwinpcs, packs some stack items, which means that one cannot guarantee that they are aligned to DI. Check for these cases and reject PRFM instructions then. Note, that this generally results in use of an extra temporary reg. clang uses 'PRFUM' instructions in those cases, so we have a missed optimisation opportunity (low priority). fixes issue #16.

Enable thumb1_gen_const_int to generate RTL or asm depending on the context, so that we avoid duplicating code to handle constants in Thumb-1 with -mpure-code. Use a template so that the algorithm is effectively shared, and rely on two classes to handle the actual emission as RTL or asm. The generated sequence is improved to handle right-shiftable and small values with less instructions. We now generate: 128: movs r0, r0, #128 264: movs r3, #33 lsls r3, #3 510: movs r3, #255 lsls r3, #1 512: movs r3, #1 lsls r3, #9 764: movs r3, #191 lsls r3, #2 65536: movs r3, #1 lsls r3, #16 0x123456: movs r3, #18 ;0x12 lsls r3, #8 adds r3, #52 ;0x34 lsls r3, #8 adds r3, #86 ;0x56 0x1123456: movs r3, #137 ;0x89 lsls r3, #8 adds r3, #26 ;0x1a lsls r3, #8 adds r3, #43 ;0x2b lsls r3, #1 0x1000010: movs r3, #16 lsls r3, #16 adds r3, #1 lsls r3, #4 0x1000011: movs r3, #1 lsls r3, #24 adds r3, #17 -8192: movs r3, #1 lsls r3, #13 rsbs r3, #0 The patch adds a testcase which does not fully exercise thumb1_gen_const_int, as other existing patterns already catch small constants. These parts of thumb1_gen_const_int are used by arm_thumb1_mi_thunk. 2020-11-02 Christophe Lyon <christophe.lyon@linaro.org> gcc/ * config/arm/arm.c (thumb1_const_rtl, thumb1_const_print): New classes. (thumb1_gen_const_int): Rename to ... (thumb1_gen_const_int_1): ... New helper function. Add capability to emit either RTL or asm, improve generated code. (thumb1_gen_const_int_rtl): New function. * config/arm/arm-protos.h (thumb1_gen_const_int): Rename to thumb1_gen_const_int_rtl. * config/arm/thumb1.md: Call thumb1_gen_const_int_rtl instead of thumb1_gen_const_int. gcc/testsuite/ * gcc.target/arm/pure-code/no-literal-pool-m0.c: New.

darwinpcs, packs some stack items, which means that one cannot guarantee that they are aligned to DI. Check for these cases and reject PRFM instructions then. Note, that this generally results in use of an extra temporary reg. clang uses 'PRFUM' instructions in those cases, so we have a missed optimisation opportunity (low priority). fixes issue #16.

The problem in this PR is that we call VPSEL with a mask of vector type instead of HImode. This happens because operand 3 in vcond_mask is the pre-computed vector comparison and has vector type. This patch fixes it by implementing TARGET_VECTORIZE_GET_MASK_MODE, returning the appropriate VxBI mode when targeting MVE. In turn, this implies implementing vec_cmp<mode><MVE_vpred>, vec_cmpu<mode><MVE_vpred> and vcond_mask_<mode><MVE_vpred>, and we can move vec_cmp<mode><v_cmp_result>, vec_cmpu<mode><mode> and vcond_mask_<mode><v_cmp_result> back to neon.md since they are not used by MVE anymore. The new *<MVE_vpred> patterns listed above are implemented in mve.md since they are only valid for MVE. However this may make maintenance/comparison more painful than having all of them in vec-common.md. In the process, we can get rid of the recently added vcond_mve parameter of arm_expand_vector_compare. Compared to neon.md's vcond_mask_<mode><v_cmp_result> before my "arm: Auto-vectorization for MVE: vcmp" patch (r12-834), it keeps the VDQWH iterator added in r12-835 (to have V4HF/V8HF support), as well as the (!<Is_float_mode> || flag_unsafe_math_optimizations) condition which was not present before r12-834 although SF modes were enabled by VDQW (I think this was a bug). Using TARGET_VECTORIZE_GET_MASK_MODE has the advantage that we no longer need to generate vpsel with vectors of 0 and 1: the masks are now merged via scalar 'ands' instructions operating on 16-bit masks after converting the boolean vectors. In addition, this patch fixes a problem in arm_expand_vcond() where the result would be a vector of 0 or 1 instead of operand 1 or 2. Since we want to skip gcc.dg/signbit-2.c for MVE, we also add a new arm_mve effective target. Reducing the number of iterations in pr100757-3.c from 32 to 8, we generate the code below: float a[32]; float fn1(int d) { float c = 4.0f; for (int b = 0; b < 8; b++) if (a[b] != 2.0f) c = 5.0f; return c; } fn1: ldr r3, .L3+48 vldr.64 d4, .L3 // q2=(2.0,2.0,2.0,2.0) vldr.64 d5, .L3+8 vldrw.32 q0, [r3] // q0=a(0..3) adds r3, r3, #16 vcmp.f32 eq, q0, q2 // cmp a(0..3) == (2.0,2.0,2.0,2.0) vldrw.32 q1, [r3] // q1=a(4..7) vmrs r3, P0 vcmp.f32 eq, q1, q2 // cmp a(4..7) == (2.0,2.0,2.0,2.0) vmrs r2, P0 @ movhi ands r3, r3, r2 // r3=select(a(0..3]) & select(a(4..7)) vldr.64 d4, .L3+16 // q2=(5.0,5.0,5.0,5.0) vldr.64 d5, .L3+24 vmsr P0, r3 vldr.64 d6, .L3+32 // q3=(4.0,4.0,4.0,4.0) vldr.64 d7, .L3+40 vpsel q3, q3, q2 // q3=vcond_mask(4.0,5.0) vmov.32 r2, q3[1] // keep the scalar max vmov.32 r0, q3[3] vmov.32 r3, q3[2] vmov.f32 s11, s12 vmov s15, r2 vmov s14, r3 vmaxnm.f32 s15, s11, s15 vmaxnm.f32 s15, s15, s14 vmov s14, r0 vmaxnm.f32 s15, s15, s14 vmov r0, s15 bx lr .L4: .align 3 .L3: .word 1073741824 // 2.0f .word 1073741824 .word 1073741824 .word 1073741824 .word 1084227584 // 5.0f .word 1084227584 .word 1084227584 .word 1084227584 .word 1082130432 // 4.0f .word 1082130432 .word 1082130432 .word 1082130432 This patch adds tests that trigger an ICE without this fix. The pr100757*.c testcases are derived from gcc.c-torture/compile/20160205-1.c, forcing the use of MVE, and using various types and return values different from 0 and 1 to avoid commonalization with boolean masks. In addition, since we should not need these masks, the tests make sure they are not present. Most of the work of this patch series was carried out while I was working at STMicroelectronics as a Linaro assignee. 2022-02-22 Christophe Lyon <christophe.lyon@arm.com> PR target/100757 gcc/ * config/arm/arm-protos.h (arm_get_mask_mode): New prototype. (arm_expand_vector_compare): Update prototype. * config/arm/arm.cc (TARGET_VECTORIZE_GET_MASK_MODE): New. (arm_vector_mode_supported_p): Add support for VxBI modes. (arm_expand_vector_compare): Remove useless generation of vpsel. (arm_expand_vcond): Fix select operands. (arm_get_mask_mode): New. * config/arm/mve.md (vec_cmp<mode><MVE_vpred>): New. (vec_cmpu<mode><MVE_vpred>): New. (vcond_mask_<mode><MVE_vpred>): New. * config/arm/vec-common.md (vec_cmp<mode><v_cmp_result>) (vec_cmpu<mode><mode, vcond_mask_<mode><v_cmp_result>): Move to ... * config/arm/neon.md (vec_cmp<mode><v_cmp_result>) (vec_cmpu<mode><mode, vcond_mask_<mode><v_cmp_result>): ... here and disable for MVE. * doc/sourcebuild.texi (arm_mve): Document new effective-target. gcc/testsuite/ PR target/100757 * gcc.target/arm/simd/pr100757-2.c: New. * gcc.target/arm/simd/pr100757-3.c: New. * gcc.target/arm/simd/pr100757-4.c: New. * gcc.target/arm/simd/pr100757.c: New. * gcc.dg/signbit-2.c: Skip when targeting ARM/MVE. * lib/target-supports.exp (check_effective_target_arm_mve): New.

darwinpcs, packs some stack items, which means that one cannot guarantee that they are aligned to DI. Check for these cases and reject PRFM instructions then. Note, that this generally results in use of an extra temporary reg. clang uses 'PRFUM' instructions in those cases, so we have a missed optimisation opportunity (low priority). fixes issue #16.

Base build changes to Darwin common code. It seems that the arm64 port will not make use of traditional mach-o pic but instead use a GOT - as such, the target-dependent parts of darwin.c are made NOP for this. We still expect to apply other Mach-O constraints. Most of the change is about the support for giving the user an error message when they try to invoke the compiler with multiple -arch flags. There is no provision in the initial port to handle the arm64_32 variant. This is (understood to be) only used in watchOS which we are not supporting initially. + No machopic indirections for Arm64 personality/LSDA entries. As for x86-64 (64bit code), the personality and LSDA .cfi_xxx entries do not require an indirection in the compiler code. + Accept arm64 in arch flags, for aarch64 compilers. We were checking for this and complaining if it was present for an X86 or PPC compiler, but we also need to accept (and ignore it) for an aarch64 / Arm64 compiler. This is enough to make a buildable cross-compiler on x86_64 Darwin and compile trivial codes. Although the link phase might not succeed - one can link objects manually and get an exe that works. There's an initial implementation of the rule changes for darwinpcs. There's an initial (pretty hacky) set of changes to deal with the post-fix assembly notation for Mach-O relocs. There are a few places where ELF was assumed, and we need to prevent incompatible output for Mach-O (probably there are other ways to do this). + Pick up atomic builtins from the libgcc.a CHECKME: should these be exported from the shared lib? (at present, that doesn't seem to be ideal). Look at what's done for the clang toolchain. + long double is DF not TF :( We will need to figure out what to do about supporting XXX*16 a some point. + Fix ptrdiff type. This was wrong (the size needs to track the 64-bitness and was failing to do so. + Add in driver sef-specs. Ensure that we issue the Darwin driver self specs and set the mabi and little-endian flags. clang accepts -mabi=darwinpcs so we allow that (but it means the same as lp64 at present since the target is determined at configuration time). + Fix an other build error for Darwin. Since we don't emit ELF function decorations this means that some of the variables are unused. + Initial implementation for EH without .cfi_xxxx While we can (most likely) make the .cfi_ codegen work, there are comments in the Ada code that suggest the capabilities of the unwinder are somewhat restricted. At least this option allows for the case of using libgcc_eh when an exe is self-contained. + Just whitespace fixes NFC. + We don't yet support TF, so reject 'q' suffix. The floating point literal suffix 'q' is specifically stated to be used for _float128, which we don't yet support. + Connect up the subtarget builtins i.e. __builtin_cfstring. The idea of OS-specific subtarget builtins doesn't fit too well with the general organisation of the aarch64 ones. What this does is to add it into the "GENERAL" class (but the darwin-specific code has no idea that the builtin code number has subfields). + Build fix for subtarget builtins. One either needs to define SUBTARGET_INIT_BUILTINS to empty or conditionalize its use + Connect up the sub-target attribute table. Darwin has some Mach-O / OS attributes, add these to the end of the aarch64 set.. + Connect up the pragma table. Darwin has some Mach-O / OS-specific pragmas, connected these to the end of the aarch64 table. gcc/ChangeLog: * config.gcc: Handle aarch64 and arm64 darwin. * config/aarch64/aarch64-protos.h (enum aarch64_symbol_type): Provide for symbol classifications for Mach-O. * config/aarch64/aarch64.c (aarch64_elf_asm_destructor): Don't define these for Mach-O (it's not ELF!). (handle_aarch64_vector_pcs_attribute): Handle darwinpcs. (aarch64_reg_save_mode): Likewise. (aarch64_load_symref_appropriately): Handle Mach-O. (aarch64_expand_mov_immediate): Likewise. (aarch64_layout_arg): Handle darwinpcs rules. (aarch64_function_arg): Likewise. (aarch64_init_cumulative_args): Likewise. (aarch64_function_arg_advance): Likewise. (aarch64_print_operand): Likewise (we can probably do better). (aarch64_print_address_internal): Likewise. (aarch64_asm_output_labelref): Likewise. (initialize_aarch64_code_model): Accept large PIC for Mach-O - of course, that doesn't mean it works. (aarch64_classify_symbol): Only emit ELF directives if they are available. (aarch64_declare_function_name): Likewise. (aarch64_asm_output_alias): Likewise. (aarch64_sls_emit_shared_blr_thunks): Likewise. (TARGET_ASM_UNALIGNED_HI_OP): New. (TARGET_ASM_UNALIGNED_SI_OP): New. (TARGET_ASM_UNALIGNED_DI_OP): New. * config/aarch64/aarch64.h (TARGET_MACHO): Declare as 0. (enum arm_pcs): Add darwinpcs. (SUBTARGET_EXTRA_SPECS): New. (EXTRA_SPECS): Allow for sub-target specs. * config/aarch64/aarch64.md (unspec enum): Add UNSPEC_MACHOPIC_OFFSET. (ldr_got_small_<mode>): Allow for postfix assembler syntax. (ldr_got_small_<mode>): Likewise. * config/aarch64/darwin.h: New file. * config/aarch64/t-aarch64-darwin: New file. Darwin, Arm64: Adjust NO_PIE spec for aarch64. Since aarch64 Darwin does not permit no-PIE, the linker warns that the option is ignored. Adjust the spec so that we do not send the option to the linker. gcc/ChangLog: * config/aarch64/darwin.h (DARWIN_NOPIE_SPEC): Revise for the aarch64 port. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> Darwin, Arm64 : Allow m64 on the command line. It seems that some people have makefiles etc. that put '-m64' for arm64 Darwin. This is allowed by clang. For the GCC version we make it an alias of -mabi=darwinpcs. aarch64, Darwin: Enable section anchors on -fsection-anchor. This is an experimental feature and might well require amendment to cater for constraints of the ld64 atom model. TODO: in supprot of that comment: 1. make the anchor base linker-visible 2. ensure that all offsets from that are local symbols. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/ChangeLog: * config/aarch64/darwin.h (TARGET_ASM_OUTPUT_ANCHOR, TARGET_USE_ANCHORS_FOR_SYMBOL_P, DARWIN_SECTION_ANCHORS): New. * config/aarch64/aarch64.c (aarch64_darwin_use_anchor_for_sym_p): Delete. (TARGET_USE_ANCHORS_FOR_SYMBOL_P): Delete. aarch64, Darwin: Ignore mdynamic-no-pic. Match the behaviour of clang in ignoring the setting of mdynamic-no-pic either on the command line or as an option to cc1. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> Darwin, Arm64 : Assign a register for the static chain. At present, we do not have a workable solution for trampolines for the Darwin Arm64 port. Executable stack is not an option and the advice from Arm is not to use any lower address bits to signal that we have a descriptor. It is possible that we might be able to load some remappable object (e.g. a dylib) - but the details there still have to be resolved. In any case, we need a usable static chain - and the port has that assigned to R18 by default - which is the platform register in darwinpcs. It's uncertain whether R16/R17 are actually used in the darwinpcs in the role of support for branch islanding. The AAPCS64 use as IP0/1 is conditional on ELF relocations, so perhaps irrelevant to Darwin. Using R16 does not conflict with the existing (non-functional) trampoline code. lots of TODOs here. aarch64, Darwin: Use darwin_binds_local_p for the target. We dind locally for PIC code (the default) on Darwin so that the default implementations will not work as expected. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/ChangeLog: * config/aarch64/darwin.h (TARGET_BINDS_LOCAL_P): New. Use darwin_bind_local_p() for this. aarhc64, Darwin: Do not give file-scope variables extra alignment. At lest, not until we determine the consequences of inter-operating with clang. Addresses Issue #68 Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/ChangeLog: * config/aarch64/darwin.h (DATA_ALIGNMENT): Just use the alignment of the underlying object for now. aarch64 : Cast print value per format description. Fixes a build fail. Darwin, Arm64 : Truncate char immediates in vector initializers to mode size. Darwin has signed chars, so that 8b immediates > 127 appear to be negative which produce large positive (out of assembler range) values when inspected by UINTVAL (). This patch truncates the values to the bitrange of the mode of the input. Fixes github issue 15. Darwin, Arm64 : Implement darwinpcs mangling for va_list. The darwinpcs says this must be mangled as char * (Pc) and not presented in the std:: namespace. aarch64, Darwin: Implement darwinpcs D.2 This allows us to pass items smaller than 8 bytes with their natural alignment packed as appropriate into the stack. This means that multiple args can use one AAPCS64 stack slot. We continue to account the stack in terms of words, but for darwinpcs the last word in the cumulative arguments is filled incrementally. So the allocation will remain 8-byte-wise, but the filling can be 1-byte aligned. This also means that darwinpcs needs to override the standard hook for TARGET_FUNCTION_ARG_ROUND_BOUNDARY. It turns out that trying to implement the Darwin PCS as CC variation is a can of worms and, since the target is chosen at configure time, not actually doing anything useful. Fallout from this included clobbering of callee saved regs etc. So - for now at least - back out of this and use the AAPCS64 as the darwinpcs, with the TARGET_MACHO flag chosing the variant. It is likely that we need to separate things more, since we haven't fully dealt with the variadic functions issue properly. Darwin, Arm64 : Additional change for darwincpcs D.4. We are allowed to pass 16bytes in regs even if the starting reg is not even-numbered. aarch64, Darwin: Adapt shared blr thunks for Darwin ABI. For Darwin we just emit the thunks as wek defintions. TODO: really we should emit this stuff before debug. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/ChangeLog: * config/aarch64/aarch64.c: Emit shared blr thunks as weak definitions. aarch64, Darwin: Initial support for relocations and asm syntax. At present, we are generating _foo+123@PAGE and we should have _foo@PAGE+123 etc. This can probably be fixed better with symbol flags and use of ASM_OUTPUT_SYMBOL_REF but that needs more work. Right now we're also stuck with GCC producing _foo@PAGE-1 as an example ... and the assmbler doesn't like it. Darwin, Arm64 : Make code label references use PAGE relocs We need to be able to refer to Lxxxx labels in libgnat. Darwin, Arm64 : Avoid negative offsets in PAGE relocs. It's not clear to me whether this is a mistake in the LLVM backend or a genuine restriction in the relocation (the wording of the addend reloc says neither 'signed' nor 'unsigned'. This works around this by making known negative offsets non-legitimate and composing the address by: ardp foo@PAGE add dest, temp, foo@PAGEOFF add dest, dest, neg_offset + We are now handling negative addends. Part of the code attempting to deal with the "PAGE-N" issue was to reject negative offsets in the legitimizers - actually, this wasn't effective anyway. We've now got code catching the cases and using a separate sum instruction, so delete these. aarch64, Darwin: Constrain page offset values to fit in the relocation. This fixes issue #52. We need to constrain the offsets in the @PAGE/@PAGEOFFS relocations to fit in a 24bit field - +/- 8Mb. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/ * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): If the offset will not fit into the relocation, then rewrite it as an addition. aarch64, Darwin: Account for UNSPEC_SALT_ADDR in symbol output. We were omitting the postfix relocation indicator because the code was falling back to the default output when a symbol was wrapped in an unspec SALT_ADDR. fixes issue #54. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> aarch64, Darwin: Allow for indexed address forms for PAGE+offset. We have been generating code like: adrp x0, sym@PAGE add x0, x0, sym@PAGEOFFS ld d0, [x0] now we generate: adrp x0, sym@PAGE ld d0 [x0, #sym@PAGEOFFS] and simmilarly for GOT accesses. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> gcc/ChangeLog: * config/aarch64/aarch64.c (aarch64_classify_address): Allow Mach-O PC relative accesses to constant pool and other defined objects. (aarch64_classify_symbol): Check for constant pool SYMREFs and only if it is not one check the Mach-O SYMBOL flags. aarch64, Darwin: Initial support for variadic function differences. These use the simpler char * version - but it remains to be seen if we need a non-standard rendition to cater for any amusing platform differences. Darwin, Arm64 : Adjust cases where stack spills pack differently. + Temporary handling for complex values. Complex values with a total size less than one stack slot might conceivably be packed in the same manner as other small values. However, this is not done - and we need to override the process for them. + Don't pack small structs either. Darwinpcs doesn't mention some things - and one is small structs. These are put into regs - but, when they spill to the stack, they don't pack in the manner of char, int et. al. + Handle HFA cases that have packed stack layout. bleah! (not sure this is complete). + Exclude unions from packing rule. + Hide an unused function. We are not using aarch64_vfp_is_call_candidate so wrap it in an #ifdef. + Fix a build error. Drop an unused var. Darwin, Arm64 : Account for stack addresses less aligned than DI. darwinpcs, packs some stack items, which means that one cannot guarantee that they are aligned to DI. Check for these cases and reject PRFM instructions then. Note, that this generally results in use of an extra temporary reg. clang uses 'PRFUM' instructions in those cases, so we have a missed optimisation opportunity (low priority). fixes issue #16. aarch64, Darwin: Handle prfm/prufm to support LLVM assemblers. 1. aarch64, Darwin : Restrict offsets for prfm. The current LLVM-based assemblers reject offsets that are not suitable for prfm as written in the local section. However, there is advice elsewhere that says that this category of instruction should attempt to use the 9bit unscaled version before falling back to the scaled one. In the short-term reject values that the assembler will not accept. This partially addresses Issue #43 gcc/ * config/aarch64/aarch64.c (aarch64_address_valid_for_prefetch_p): Reject values incompatible with pfrum and out of range for pfrm. For Mach-O, reject values that require prfum. 2. aarch64, Darwin : Match conditions for a PRFUM insn. This unpessimizes the prefetch cases for Darwin where the assembler is not able to substitute the prfum instructions automagically. This improves the fix for Issue #43. * config/aarch64/aarch64-protos.h * config/aarch64/aarch64.c * config/aarch64/aarch64.md * config/aarch64/constraints.md * config/aarch64/predicates.md Darwin, aarch64: Document the ABI (darwinpcs) and changes from that. Darwin,aarch64: Limit PAGE offsets to positive values for Darwin. Because of an assembler/linker bug, we cannot currently accept negative offset values for PAGEOFF relocations. While we were already catching this in expansion, there are cases where combine can produce values that need to be excluded. So reject symbol_refs with negative offsets.

iains closed this as completed Sep 3, 2020

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__builtin_prefetch leads to assembler error #16

__builtin_prefetch leads to assembler error #16

fxcoudert commented Aug 31, 2020

fxcoudert commented Aug 31, 2020

fxcoudert commented Aug 31, 2020

iains commented Aug 31, 2020

iains commented Sep 3, 2020

__builtin_prefetch leads to assembler error #16

__builtin_prefetch leads to assembler error #16

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fxcoudert commented Aug 31, 2020

fxcoudert commented Aug 31, 2020

fxcoudert commented Aug 31, 2020

iains commented Aug 31, 2020

iains commented Sep 3, 2020