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Merge pull request #267 from icedland/csdecoder2
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Speed up C# `Decoder` a little bit
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@wtfsck
wtfsck committed Feb 12, 2022
2 parents 946a32b + 5161209 commit a49d0e6
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Showing 10 changed files with 729 additions and 750 deletions.
223 changes: 110 additions & 113 deletions src/csharp/Intel/Iced/Intel/Decoder.cs
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6 changes: 3 additions & 3 deletions src/csharp/Intel/Iced/Intel/DecoderInternal/OpCodeHandlers.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,7 @@ public OpCodeHandler_MandatoryPrefix2(OpCodeHandler handler)
decoder.state.Encoding == EncodingKind.EVEX ||
decoder.state.Encoding == EncodingKind.XOP ||
decoder.state.Encoding == EncodingKind.MVEX);
handlers[(int)decoder.state.mandatoryPrefix].Decode(decoder, ref instruction);
handlers[(int)decoder.state.zs.mandatoryPrefix].Decode(decoder, ref instruction);
}
}

Expand Down Expand Up @@ -162,7 +162,7 @@ sealed class OpCodeHandler_MandatoryPrefix2_NoModRM : OpCodeHandler {
decoder.state.Encoding == EncodingKind.EVEX ||
decoder.state.Encoding == EncodingKind.XOP ||
decoder.state.Encoding == EncodingKind.MVEX);
handlers[(int)decoder.state.mandatoryPrefix].Decode(decoder, ref instruction);
handlers[(int)decoder.state.zs.mandatoryPrefix].Decode(decoder, ref instruction);
}
}

Expand All @@ -183,7 +183,7 @@ sealed class OpCodeHandler_W : OpCodeHandlerModRM {
decoder.state.Encoding == EncodingKind.EVEX ||
decoder.state.Encoding == EncodingKind.XOP ||
decoder.state.Encoding == EncodingKind.MVEX);
((decoder.state.flags & StateFlags.W) != 0 ? handlerW1 : handlerW0).Decode(decoder, ref instruction);
((decoder.state.zs.flags & StateFlags.W) != 0 ? handlerW1 : handlerW0).Decode(decoder, ref instruction);
}
}

Expand Down
266 changes: 133 additions & 133 deletions src/csharp/Intel/Iced/Intel/DecoderInternal/OpCodeHandlers_EVEX.cs
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486 changes: 234 additions & 252 deletions src/csharp/Intel/Iced/Intel/DecoderInternal/OpCodeHandlers_Legacy.cs
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62 changes: 31 additions & 31 deletions src/csharp/Intel/Iced/Intel/DecoderInternal/OpCodeHandlers_MVEX.cs
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Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ sealed class OpCodeHandler_EH : OpCodeHandlerModRM {

public override void Decode(Decoder decoder, ref Instruction instruction) {
Debug.Assert(decoder.state.Encoding == EncodingKind.MVEX);
((decoder.state.flags & StateFlags.MvexEH) != 0 ? handlerEH1 : handlerEH0).Decode(decoder, ref instruction);
((decoder.state.zs.flags & StateFlags.MvexEH) != 0 ? handlerEH1 : handlerEH0).Decode(decoder, ref instruction);
}
}

Expand Down Expand Up @@ -68,14 +68,14 @@ sealed class OpCodeHandler_MVEX_MV : OpCodeHandlerModRM {
instruction.InternalSetCodeNoCheck(code);
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = (int)(decoder.state.reg + decoder.state.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
instruction.Op1Register = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
var mvex = new MvexInfo(code);
var sss = decoder.state.Sss;
if (decoder.state.mod == 3)
decoder.SetInvalidInstruction();
else {
instruction.Op0Kind = OpKind.Memory;
if (mvex.CanUseEvictionHint && (decoder.state.flags & StateFlags.MvexEH) != 0)
if (mvex.CanUseEvictionHint && (decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down Expand Up @@ -103,14 +103,14 @@ sealed class OpCodeHandler_MVEX_VW : OpCodeHandlerModRM {

Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op0Kind = OpKind.Register;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
var mvex = new MvexInfo(code);
var sss = decoder.state.Sss;
if (decoder.state.mod == 3) {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + Register.ZMM0;
if ((decoder.state.flags & StateFlags.MvexEH) != 0) {
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0) {
if (mvex.CanUseSuppressAllExceptions) {
if ((sss & 4) != 0)
instruction.InternalSetSuppressAllExceptions();
Expand All @@ -135,7 +135,7 @@ sealed class OpCodeHandler_MVEX_VW : OpCodeHandlerModRM {
}
else {
instruction.Op1Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down Expand Up @@ -168,7 +168,7 @@ sealed class OpCodeHandler_MVEX_HWIb : OpCodeHandlerModRM {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + Register.ZMM0;
if ((decoder.state.flags & StateFlags.MvexEH) != 0) {
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0) {
if (mvex.CanUseSuppressAllExceptions) {
if ((sss & 4) != 0)
instruction.InternalSetSuppressAllExceptions();
Expand All @@ -193,7 +193,7 @@ sealed class OpCodeHandler_MVEX_HWIb : OpCodeHandlerModRM {
}
else {
instruction.Op1Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down Expand Up @@ -223,14 +223,14 @@ sealed class OpCodeHandler_MVEX_VWIb : OpCodeHandlerModRM {

Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op0Kind = OpKind.Register;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
var mvex = new MvexInfo(code);
var sss = decoder.state.Sss;
if (decoder.state.mod == 3) {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + Register.ZMM0;
if ((decoder.state.flags & StateFlags.MvexEH) != 0) {
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0) {
if (mvex.CanUseSuppressAllExceptions) {
if ((sss & 4) != 0)
instruction.InternalSetSuppressAllExceptions();
Expand All @@ -255,7 +255,7 @@ sealed class OpCodeHandler_MVEX_VWIb : OpCodeHandlerModRM {
}
else {
instruction.Op1Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down Expand Up @@ -283,7 +283,7 @@ sealed class OpCodeHandler_MVEX_VHW : OpCodeHandlerModRM {

Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op0Kind = OpKind.Register;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = (int)decoder.state.vvvv + Register.ZMM0;
Expand All @@ -295,7 +295,7 @@ sealed class OpCodeHandler_MVEX_VHW : OpCodeHandlerModRM {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op2Kind = OpKind.Register;
instruction.Op2Register = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + Register.ZMM0;
if ((decoder.state.flags & StateFlags.MvexEH) != 0) {
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0) {
if (mvex.CanUseSuppressAllExceptions) {
if ((sss & 4) != 0)
instruction.InternalSetSuppressAllExceptions();
Expand All @@ -320,7 +320,7 @@ sealed class OpCodeHandler_MVEX_VHW : OpCodeHandlerModRM {
}
else {
instruction.Op2Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand All @@ -346,7 +346,7 @@ sealed class OpCodeHandler_MVEX_VHWIb : OpCodeHandlerModRM {

Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op0Kind = OpKind.Register;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = (int)decoder.state.vvvv + Register.ZMM0;
Expand All @@ -356,7 +356,7 @@ sealed class OpCodeHandler_MVEX_VHWIb : OpCodeHandlerModRM {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op2Kind = OpKind.Register;
instruction.Op2Register = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + Register.ZMM0;
if ((decoder.state.flags & StateFlags.MvexEH) != 0) {
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0) {
if (mvex.CanUseSuppressAllExceptions) {
if ((sss & 4) != 0)
instruction.InternalSetSuppressAllExceptions();
Expand All @@ -381,7 +381,7 @@ sealed class OpCodeHandler_MVEX_VHWIb : OpCodeHandlerModRM {
}
else {
instruction.Op2Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down Expand Up @@ -411,7 +411,7 @@ sealed class OpCodeHandler_MVEX_VKW : OpCodeHandlerModRM {

Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op0Kind = OpKind.Register;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
instruction.Op0Register = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = ((int)decoder.state.vvvv & 7) + Register.K0;
Expand All @@ -421,7 +421,7 @@ sealed class OpCodeHandler_MVEX_VKW : OpCodeHandlerModRM {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op2Kind = OpKind.Register;
instruction.Op2Register = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + Register.ZMM0;
if ((decoder.state.flags & StateFlags.MvexEH) != 0) {
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0) {
if (mvex.CanUseSuppressAllExceptions) {
if ((sss & 4) != 0)
instruction.InternalSetSuppressAllExceptions();
Expand All @@ -446,7 +446,7 @@ sealed class OpCodeHandler_MVEX_VKW : OpCodeHandlerModRM {
}
else {
instruction.Op2Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down Expand Up @@ -476,15 +476,15 @@ sealed class OpCodeHandler_MVEX_KHW : OpCodeHandlerModRM {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = (int)decoder.state.vvvv + Register.ZMM0;
if (((decoder.state.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
if (((decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
var mvex = new MvexInfo(code);
var sss = decoder.state.Sss;
if (decoder.state.mod == 3) {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op2Kind = OpKind.Register;
instruction.Op2Register = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + Register.ZMM0;
if ((decoder.state.flags & StateFlags.MvexEH) != 0) {
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0) {
if (mvex.CanUseSuppressAllExceptions) {
if ((sss & 4) != 0)
instruction.InternalSetSuppressAllExceptions();
Expand All @@ -509,7 +509,7 @@ sealed class OpCodeHandler_MVEX_KHW : OpCodeHandlerModRM {
}
else {
instruction.Op2Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down Expand Up @@ -545,7 +545,7 @@ sealed class OpCodeHandler_MVEX_KHWIb : OpCodeHandlerModRM {
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op2Kind = OpKind.Register;
instruction.Op2Register = (int)(decoder.state.rm + decoder.state.extraBaseRegisterBaseEVEX) + Register.ZMM0;
if ((decoder.state.flags & StateFlags.MvexEH) != 0) {
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0) {
if (mvex.CanUseSuppressAllExceptions) {
if ((sss & 4) != 0)
instruction.InternalSetSuppressAllExceptions();
Expand All @@ -570,14 +570,14 @@ sealed class OpCodeHandler_MVEX_KHWIb : OpCodeHandlerModRM {
}
else {
instruction.Op2Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
instruction.InternalSetMvexRegMemConv(MvexRegMemConv.MemConvNone + sss);
decoder.ReadOpMem(ref instruction, mvex.GetTupleType(sss));
}
if (((decoder.state.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
if (((decoder.state.zs.extraRegisterBase | decoder.state.extraRegisterBaseEVEX) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
instruction.Op3Kind = OpKind.Immediate8;
instruction.Immediate8 = (byte)decoder.ReadByte();
Expand Down Expand Up @@ -606,7 +606,7 @@ sealed class OpCodeHandler_MVEX_VSIB : OpCodeHandlerModRM {
decoder.SetInvalidInstruction();
else {
instruction.Op0Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down Expand Up @@ -634,14 +634,14 @@ sealed class OpCodeHandler_MVEX_VSIB_V : OpCodeHandlerModRM {

Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op1Kind = OpKind.Register;
instruction.Op1Register = (int)(decoder.state.reg + decoder.state.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
instruction.Op1Register = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX) + Register.ZMM0;
var mvex = new MvexInfo(code);
var sss = decoder.state.Sss;
if (decoder.state.mod == 3)
decoder.SetInvalidInstruction();
else {
instruction.Op0Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand All @@ -667,7 +667,7 @@ sealed class OpCodeHandler_MVEX_V_VSIB : OpCodeHandlerModRM {
decoder.SetInvalidInstruction();
instruction.InternalSetCodeNoCheck(code);

int regNum = (int)(decoder.state.reg + decoder.state.extraRegisterBase + decoder.state.extraRegisterBaseEVEX);
int regNum = (int)(decoder.state.reg + decoder.state.zs.extraRegisterBase + decoder.state.extraRegisterBaseEVEX);
Static.Assert(OpKind.Register == 0 ? 0 : -1);
//instruction.Op0Kind = OpKind.Register;
instruction.Op0Register = regNum + Register.ZMM0;
Expand All @@ -677,7 +677,7 @@ sealed class OpCodeHandler_MVEX_V_VSIB : OpCodeHandlerModRM {
decoder.SetInvalidInstruction();
else {
instruction.Op1Kind = OpKind.Memory;
if ((decoder.state.flags & StateFlags.MvexEH) != 0)
if ((decoder.state.zs.flags & StateFlags.MvexEH) != 0)
instruction.InternalSetIsMvexEvictionHint();
if ((mvex.InvalidConvFns & (1U << sss) & decoder.invalidCheckMask) != 0)
decoder.SetInvalidInstruction();
Expand Down

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