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Real memory size of SPI chip? #42
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aha.. very interesting, the 32kb idea fits with atxmega mpu ... and a onboard extra 512kb flashmem could be possible then. If we have that extra mem, we can do some more fun things :) |
should have that test in a neat package in order for ppl to be able to report back here their results aswell |
Have you guys identified the SPI chip model? It seems that the inscription on it is missing. |
@iceman1001 It may be much easier to expose 0x9F read information from flash function, i have implemented it like this:
Right now from results of my tests i do not have reasons to do not trust output of this function. @bogiton |
Exposing the get manufacture/device id function will do just fine. PR? |
If this correct, the 8 slots can now have much larger memory allocations :) No need for that annoying 4k/1k solution. We can also have seperate memory for switching between type of cards. Like also saving signature / configs, counters etc for UL/ntag styled. |
@Skydev0h I believe that you are right. If anyone is interested this is most likely the SPI chip's orientation and pinout: |
Added PR, it would be nice to get some info from people here. |
suggested some change |
What, where, dont see anything... |
look at your PR |
Strange, refresh your browser cache? ctrl-f5? |
Used another browser with the same result - nothing. |
well, it could be related to the GDPR law going on... Let me check my settings. |
@bogiton let me test an idea since you are a collaborater, can you see the review ? |
plottwist, Olaf the manufacturer, said it was a 1Mbyte flashmem now that I asked. Which is a bit more than @Skydev0h 's findings. Now I'm excited, we don't have any space limits anymore. We can start adding a better memory layout for a slot. And the logging will also work! |
btw, I just merge the PR instead. I only wanted to have a better option for when printing the manufacture/device id is not found. |
@iceman1001 too bad i could not see the comment, but you could commit that yourself - i did not deny commits from collaborators. Anyway i do not expect that situation to ever happen - that our boards have some non-existing chip outside of dataflash specifications. Well, i have 512 KBytes flash mem, afterwards it wraps around, so it may not be safe to expect having 1 MByte memory for everyone, now when the PR is merged we can ask ppl to test their own SPI chips with this commands and post results, they may be valuable determining the real minimum amount of memory in end-user devices. Too bad that we cannot use SPI for storing code because of AVR's Harvard architecture, but we can use flash to store data (of course in case of realtime data like logging of RF commands it should be first cached to RAM, because writing to SPI is VERY slow - for example i had to add caching to entire MFUL data because my reader did common write-read-verify pattern, and it could not do that in time without RAM caching!) Anyway as for the current code, 32K may actually be a problem - more strange is that near the 29K-30K it clashes with bootloader, although there is dedicated memory space for bootloader... which is strange. |
Dunno why it couldn't be seen. Anyway, I merged it and we can go on with this piece of information. We can also add to the GUI an option to share their findings with the press of a button :) in order to collect it faster. I don't think there is too many people who are actually using this fork. :/ I guess we would need to figure out a buffer memory for the active slot that gets save to flash memory at intervalls? or after a timeout of no use. There is so much little info for being a opensource from the beginning. There should be lots of info from offical revE. I belive the whole memory mapping part in current software is the most confusing part. I really don't understand the mix between a buffer array in ram or when its read from flashmemory... |
@maxieds Now this piece of information enables logging without problem. :) |
A bit late to the party, but I just tried out that flashinfo command:
1MB flash mem! That's pretty amazing! |
Also late to the party,
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Mine:
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--> SPI_FLASHINFOMY |
me too (cheapest board from Alie****s): SPI_FLASHINFO |
@albockit Probably same as you have. --> SPI_FLASHINFO |
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Bought at Lab401; Q1 2019.
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Maybe we should to a wiki page where we enter all the different memory sizes we have encounted? |
So far it seems that there is nearly same amount of 4 and 8 Mbit chips that are encountered. |
@iceman1001 @Skydev0h Yeah or more preferably a page to summarize all of the hardware specs for commonly found RevE Rebooted. I had to look for SRAM, EEPROM, Flash and related sizes many times. I did however already create a page for SPI Flash reference, with links to data sheets, and to a memory management library on GitHub that may be a good source of inspiration in the future. |
Now that was great initative! I think its time to close this one, since all is documented in the Wiki Maybe we should just name it Notes on SPI.. |
@iceman1001 @bogiton @Skydev0h @slurdge , I also put a hardware summary page here, please fill free to complete as I do not even really know what I wrote... :) https://github.com/iceman1001/ChameleonMini-rebooted/wiki/Hardware-summary |
It seems that the memory size of SPI chip is far beyond 32K.
From my testing by getting manufacturer and chip id info it returned 1F 24 00 00 which corresponds to 4-Mbit chip (thats 512 KBytes!)
And from my testing (write-read-check zero address) it actually has 512 KBytes!
I have got my board from lab401, and it seems to be the common RevE-rebooted board:
Unfortunately I do not have other RevE-rebooted boards to test whether chip memory density is consistent across boards, however i discovered that there are no DataFlash chips with memory density lower than 128 KBytes.
Perhaps 32K of memory that manufacturer declared actually is about the atxmega program memory itself? May need some testing with other physical RevE-rebooted boards.
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