-
Notifications
You must be signed in to change notification settings - Fork 31
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Warnings by GoWin IDE #14
Comments
Hi Till, Seems like a defect in the Verilog compiler you are using. Or at least a very particular interpretation of the language. I'm not an expert on the subtle details of the language. But in the second case it definitely seems like your compiler is broken. May be the compiler ignores the "unique" clause used in the case statement, or it doesn't support local variables? reg type doesn't necessarily specific a latch or a register. It can be used in combinational logic. Actually in cases like this, reg (or logic) must be used and a wire declaration is not allowed. Anyway, your modifications seems fine. Regards, Anyway, |
Hi Ijor. Thanks for the fast reply. I am definitely no expert. But I think I understand why the tool complains (I am unsure, but IMHO under the hood it's Synopsis/sinplify). In both cases there are combinatorics which aren't set under all circumstances. So there are situations where the expected behavior seem to be to keep the current state. Which in turn is a latch. Anyway. It works all and also the blitter works and I am actually pretty impressed that the code works out of the box on a synthesis tool it has never been tested for and which is not very mature. Thanks again. I am having a lots of fun with your code ... |
I am running fx68k on a Tang Nano 20k. It worked out of the box and at least boots a MiSTery core to the desktop. Still there are a few warnings which might be worth looking at:
This warning only refers to bit 4. But from similar cases i've learned that this may also apply to lower bits which aren't reported. This is related to the default case in line 805 in fx68kAlu being commented out:
Why is this commented? Enabling line 805 will at least still boot to the TOS desktop. So it doesn't break the CPU completely.
A similar warning is
Why is stype a reg? Isn't it all supposed to be just combinatorics? And instead of
use something like
case( { (size11?ird[ 10:9]:ird[ 4:3]), ird[8]})
This change also doesn't seem to affect the very basic functionality and the resulting CPU also boots to TOS desktop.
The text was updated successfully, but these errors were encountered: