Run cargo intraconv to convert documentation links

Remove outdated documentation. Manually fix the documentation issues
noted when generating the new docs.

src/dma.rs

@@ -1,12 +1,12 @@
 //! Direct Memory Access (DMA) for async I/O
 //!
-//! DMA [`Channel`s](struct.Channel.html) power some asynchronous I/O operations.
-//! Use [`channels`](fn.channels.html) to acquire all of the processor's DMA channels.
+//! DMA [`Channel`s](Channel) power some asynchronous I/O operations.
+//! Use [`channels`](channels()) to acquire all of the processor's DMA channels.
 //! Then, use the `Channel`s in APIs that require them. The implementation handles
 //! DMA receive and transfer operations, and ensures that the lifetime of your buffers
 //! is correct.
 //!
-//! The implementation also provides a [`pipe`](pipe/index.html), a hardware-backed
+//! The implementation also provides a [`pipe`], a hardware-backed
 //! communication channels (not to be confused with DMA `Channel`s). Use `pipe` senders
 //! and receivers to synchronize tasks, and transmit `Copy` data between tasks using
 //! DMA hardware.
@@ -43,18 +43,18 @@ pub enum Error {
     Setup(ErrorStatus),
     /// The operation was cancelled
     ///
-    /// `Cancelled` is the return from a [`pipe`](pipe/index.html) sender or
+    /// `Cancelled` is the return from a [`pipe`] sender or
     /// receiver when the other half is dropped.
     Cancelled,
 }
 
 /// Initialize and acquire the DMA channels
 ///
-/// The return is 32 channels. However, **only the first [`CHANNEL_COUNT`](constant.CHANNEL_COUNT.html) channels
+/// The return is 32 channels. However, **only the first [`CHANNEL_COUNT`] channels
 /// are initialized to `Some(channel)`. The rest are `None`**.
 ///
 /// You should enable the clock gates before calling `channels`. See
-/// [`ccm::Handle::clock_gate_dma`](../ccm/struct.Handle.html#method.set_clock_gate_dma) for more information.
+/// [`ccm::Handle::clock_gate_dma`](super::ccm::Handle::set_clock_gate_dma()) for more information.
 ///
 /// # Example
 ///

src/dma/pipe.rs

@@ -3,10 +3,10 @@
 //! _(Note: this API is similar to typical 'channels' that you'll find in the Rust ecosystem. We
 //! use 'pipe' to disambiguate between this software channel and a hardware DMA channel.)_
 //!
-//! `pipe` provides a mechanism for sending data across tasks. The [`Sender`](struct.Sender.html)
-//! half can send `Copy` data, and the [`Receiver`](struct.Receiver.html)
+//! `pipe` provides a mechanism for sending data across tasks. The [`Sender`]
+//! half can send `Copy` data, and the [`Receiver`]
 //! half can receive that same data. The tasks use a DMA channel to transfer the data across tasks.
-//! Use [`new`](fn.new.html) to create both halves of a pipe.
+//! Use [`new`](new()) to create both halves of a pipe.
 //!
 //! A `Sender` blocks until the `Receiver` is ready to receive data. Likewise, the `Receiver` blocks until
 //! the `Sender` is ready to send data. This creates a synchronization point for the two tasks. When the transfer
@@ -17,7 +17,7 @@
 //! task.
 //!
 //! To cancel a transfer, drop either the `Sender` or the `Receiver`. When one half is dropped, the remaining half will
-//! immediately return an [`Error::Cancelled`](../enum.Error.html#variant.Cancelled). The remaining half can never be used
+//! immediately return an [`Error::Cancelled`](super::Error::Cancelled). The remaining half can never be used
 //! again, as it will always, immediately return `Error::Cancelled`.
 //!
 //! # Example
@@ -81,14 +81,14 @@ use core::{
 const SENDER_STATE: usize = 0;
 const RECEIVER_STATE: usize = 1;
 
-/// Alias for a `Result` that might return an [`Error`](../enum.Error.html).
+/// Alias for a `Result` that might return an [`Error`](super::Error).
 pub type Result<T> = core::result::Result<T, dma::Error>;
 
 /// The sending half of a pipe
 ///
-/// Use [`new`](fn.new.html) to create both halves of a pipe.
+/// Use [`new`](new()) to create both halves of a pipe.
 ///
-/// Once `Sender` is dropped, the associated [`Receiver`](struct.Receiver.html) will never block,
+/// Once `Sender` is dropped, the associated [`Receiver`] will never block,
 /// and always return an error.
 pub struct Sender<E> {
     /// Aliased in Receiver
@@ -107,9 +107,9 @@ impl<E> Sender<E> {
 
 /// The receiving half of a pipe
 ///
-/// Use [`new`](fn.new.html) to create both halves of a pipe.
+/// Use [`new`](new()) to create both halves of a pipe.
 ///
-/// Once `Receiver` is dropped, the associated [`Sender`](struct.Sender.html) will never block,
+/// Once `Receiver` is dropped, the associated [`Sender`] will never block,
 /// and always return an error.
 pub struct Receiver<E> {
     /// Aliased in Sender
@@ -131,7 +131,7 @@ impl<E> Receiver<E> {
 /// # Example
 ///
 /// Demonstrate pipe construction, and how to send and receive data. For a larger example, see the
-/// [module-level documentation](index.html).
+/// [module-level documentation](self).
 /// ```no_run
 /// use imxrt_async_hal as hal;
 /// use hal::{ccm::{CCM, ClockGate}, dma};
@@ -171,7 +171,7 @@ struct Send<'t, E> {
 impl<E: Copy> Sender<E> {
     /// Await the receive half, and transmit `value` once the receiver is ready
     ///
-    /// Returns nothing if the transfer was successful, or an [`Error`](../enum.Error.html)
+    /// Returns nothing if the transfer was successful, or an [`Error`](super::Error)
     /// if the transfer failed.
     pub async fn send<'t>(&'t mut self, value: &'t E) -> Result<()> {
         unsafe {
@@ -257,7 +257,7 @@ struct Receive<'t, E> {
 impl<E: Copy + Unpin> Receiver<E> {
     /// Await the sender to send data, unblocking once the transfer completes
     ///
-    /// Returns the transmitted data, or an [`Error`](../enum.Error.html) if the transfer failed.
+    /// Returns the transmitted data, or an [`Error`](super::Error) if the transfer failed.
     pub async fn receive(&mut self) -> Result<E> {
         unsafe {
             shared_mut(&mut self.channel)[RECEIVER_STATE].set_state(state::READY);

src/gpio.rs

@@ -1,7 +1,7 @@
 //! GPIOs
 //!
-//! [`GPIO`s](struct.GPIO.html) can be in either input or output states. GPIO inputs can
-//! read the high / low status of physical pins. Based on a [`Trigger`](enum.Trigger.html)
+//! [`GPIO`s](GPIO) can be in either input or output states. GPIO inputs can
+//! read the high / low status of physical pins. Based on a [`Trigger`]
 //! selection, GPIO inputs can wait for transitions on the input pin.
 //!
 //! ```no_run
@@ -75,9 +75,8 @@ pub enum Output {}
 
 /// A wrapper around an i.MX RT processor pad, supporting simple I/O
 ///
-/// Use [`new`](#method.new) with a pad from the [`iomuxc`](../iomuxc/index.html)
-/// module, or a Teensy 4 [`pin`](../pins/index.html). All GPIOs start in the input state. Use
-/// [`output`](#method.output) to become an output pin.
+/// Use [`new`](GPIO::new()) with a pad from the [`iomuxc`](super::iomuxc)
+/// module. All GPIOs start in the input state. Use [`output`](GPIO::output()) to become an output pin.
 ///
 /// ```no_run
 /// use imxrt_async_hal as hal;
@@ -90,7 +89,7 @@ pub enum Output {}
 /// led.set();
 /// ```
 ///
-/// When using a `GPIO` as an input, you can wait for transitions using [`wait_for`](#method.wait_for).
+/// When using a `GPIO` as an input, you can wait for transitions using [`wait_for`](GPIO::wait_for()).
 #[cfg_attr(docsrs, doc(cfg(feature = "gpio")))]
 pub struct GPIO<P, D> {
     pin: P,
@@ -299,7 +298,7 @@ where
 
     /// Alternate the state of the pin
     ///
-    /// Using `toggle` will be more efficient than checking [`is_set`](#method.is_set)
+    /// Using `toggle` will be more efficient than checking [`is_set`](GPIO::is_set())
     /// and then selecting the opposite state.
     pub fn toggle(&mut self) {
         // Safety: atomic write
@@ -309,7 +308,7 @@ where
 
 /// Input interrupt triggers
 ///
-/// See [`GPIO::wait_for`](#method.wait_for) for more information.
+/// See [`GPIO::wait_for`](GPIO::wait_for()) for more information.
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
 #[cfg_attr(docsrs, doc(cfg(feature = "gpio")))]
 pub enum Trigger {

src/gpt.rs

@@ -10,7 +10,7 @@ use core::{
 /// General purpose timers (GPT)
 ///
 /// The timer **divides the input clock by 5**. This may affect very precise
-/// timing. For a more precise timer, see [`PIT`](struct.PIT.html).
+/// timing. For a more precise timer, see [`PIT`](crate::PIT).
 ///
 /// # Example
 ///

src/i2c.rs

@@ -25,7 +25,7 @@ use crate::{
 ///
 /// The driver also yields when waiting for stop and repeated start conditions.
 ///
-/// The I2C clock speed is unspecified out of construction. Use [`set_clock_speed`](#method.set_clock_speed)
+/// The I2C clock speed is unspecified out of construction. Use [`set_clock_speed`](I2C::set_clock_speed())
 /// to select a valid I2C clock speed.
 ///
 /// The RAL instances are available in `ral::lpi2c`.
@@ -100,7 +100,7 @@ where
     /// Create an I2C driver from an I2C instance and a pair of I2C pins
     ///
     /// The I2C clock speed of the returned `I2C` driver is unspecified and may not be valid.
-    /// Use [`set_clock_speed`](#method.set_clock_speed) to select a valid I2C clock speed.
+    /// Use [`set_clock_speed`](I2C::set_clock_speed()) to select a valid I2C clock speed.
     pub fn new(
         i2c: crate::instance::I2C<M>,
         mut scl: SCL,
@@ -145,14 +145,14 @@ where
     }
 }
 
-/// Errors propagated from an [`I2C`](struct.I2C.html) device
+/// Errors propagated from an [`I2C`] device
 #[non_exhaustive]
 #[derive(Debug)]
 #[cfg_attr(docsrs, doc(cfg(feature = "i2c")))]
 pub enum Error {
     /// There was an issue when setting the clock speed
     ///
-    /// Only returned from [`set_clock_speed`](struct.I2C.html#method.set_clock_speed).
+    /// Only returned from [`set_clock_speed`](I2C::set_clock_speed()).
     ClockSpeed,
     /// Master has lost arbitration
     LostBusArbitration,
@@ -182,7 +182,7 @@ impl<SCL, SDA> I2C<SCL, SDA> {
 
     /// Set the I2C clock speed
     ///
-    /// If there is an error, error variant is [`I2CError::ClockSpeed`](enum.I2CError.html#variant.ClockSpeed).
+    /// If there is an error, error variant is [`crate::i2c::Error::ClockSpeed`].
     pub fn set_clock_speed(&mut self, clock_speed: ClockSpeed) -> Result<(), Error> {
         while_disabled(&self.i2c, |i2c| {
             clock::set_speed(clock_speed, self.hz, i2c);

src/instance.rs

@@ -4,13 +4,13 @@
 //! type system. For instance, an `LPUART2` peripheral and an `LPUART3` peripheral
 //! are represented by the same Rust type, `ral::lpuart::Instance`.
 //!
-//! However, the [`iomuxc` APIs](../iomuxc/index.html) work with strongly-typed peripheral
+//! However, the [`iomuxc` APIs](super::iomuxc) work with strongly-typed peripheral
 //! instances, which are identified by a type-level constant. This interface expects `LPUART2`
 //! and `LPUART3` to be unique types. To bridge these APIs,
 //! and ensure that your peripheral instances work with your pin selections,
 //! use the `instance` interface.
 //!
-//! An [`Instance`](struct.Instance.html) wraps a RAL peripheral instance, requiring that the
+//! An [`Instance`] wraps a RAL peripheral instance, requiring that the
 //! peripheral instance matches its type-level constant. The interface ensures that your
 //! RAL instance matches the type-level constant:
 //!
@@ -47,7 +47,7 @@ use crate::{iomuxc::consts, ral};
 
 /// A trait implemented on RAL instances
 ///
-/// [`inst`](#method.inst) returns the peripheral instance as a run-time value.
+/// [`inst`](Inst::inst()) returns the peripheral instance as a run-time value.
 ///
 /// ```no_run
 /// use imxrt_async_hal as hal;
@@ -149,7 +149,7 @@ impl private::Sealed for ral::lpuart::Instance {}
 
 /// Alias for an `Instance` around a `ral::lpuart::Instance`
 ///
-/// See [`uart`](fn.uart.html) to acquire a `UART` instance.
+/// See [`uart`](uart()) to acquire a `UART` instance.
 #[cfg(feature = "uart")]
 #[cfg_attr(docsrs, doc(cfg(feature = "uart")))]
 pub type UART<M> = Instance<ral::lpuart::Instance, M>;
@@ -195,7 +195,7 @@ impl private::Sealed for ral::lpspi::Instance {}
 
 /// Alias for an `Instance` around a `ral::lpspi::Instance`
 ///
-/// See [`spi`](fn.spi.html) to acquire a `SPI` instance.
+/// See [`spi`](spi()) to acquire a `SPI` instance.
 #[cfg(feature = "spi")]
 #[cfg_attr(docsrs, doc(cfg(feature = "spi")))]
 pub type SPI<M> = Instance<ral::lpspi::Instance, M>;
@@ -241,7 +241,7 @@ impl private::Sealed for ral::lpi2c::Instance {}
 
 /// Alias for an `Instance` around a `ral::lpi2c::Instance`
 ///
-/// See [`i2c`](fn.i2c.html) to acquire an `I2C` instance.
+/// See [`i2c`](i2c()) to acquire an `I2C` instance.
 #[cfg(feature = "i2c")]
 #[cfg_attr(docsrs, doc(cfg(feature = "i2c")))]
 pub type I2C<M> = Instance<ral::lpi2c::Instance, M>;

src/lib.rs

@@ -218,7 +218,7 @@ pub mod ccm {
     //! Clock control module (CCM)
     //!
     //! The clocks and types exposed in `ccm` support clock control and peripheral clock
-    //! gating. Use [`CCM::from_ral`](type.CCM.html) to acquire the clock roots and the
+    //! gating. Use [`CCM::from_ral`](CCM) to acquire the clock roots and the
     //! CCM handle. Then, enable your clocks.
     //!
     //! ```no_run
@@ -257,7 +257,7 @@ pub mod ccm {
 
     pub use imxrt_ccm::{
         ral::{I2CClock, PerClock, SPIClock, UARTClock, CCM},
-        ClockGate,
+        ClockGate, Handle,
     };
 }
 #[cfg(any(feature = "pipe", feature = "spi", feature = "uart"))]
@@ -324,8 +324,8 @@ mod once {
 ///
 /// The `iomuxc` module is a re-export of the [`imxrt-iomuxc`] crate. It combines
 /// the i.MX RT processor-specific components with the `imxrt-iomuxc` general API.
-/// It then adds a safe function, [`take`](fn.take.html), which lets you convert
-/// the RAL's `iomuxc::Instance` into all of the processor [`Pads`](struct.Pads.html).
+/// It then adds a safe function, `take`, which lets you convert
+/// the RAL's `iomuxc::Instance` into all of the processor [`Pads`](crate::iomuxc::pads::Pads).
 ///
 /// ```no_run
 /// use imxrt_async_hal as hal;

src/pit.rs

@@ -13,7 +13,7 @@ use core::{
 /// The PIT timer channels are the most precise timers in the HAL. PIT timers run on the periodic clock
 /// frequency.
 ///
-/// A single hardware PIT instance has four PIT channels. Use [`new`](#method.new) to acquire these four
+/// A single hardware PIT instance has four PIT channels. Use [`new`](PeriodicTimer::new()) to acquire these four
 /// channels.
 ///
 /// # Example

src/spi.rs

@@ -2,7 +2,7 @@ use crate::{dma, instance, iomuxc, ral};
 
 /// Pins for a SPI device
 ///
-/// Consider using type aliases to simplify your [`SPI`](struct.SPI.html) usage:
+/// Consider using type aliases to simplify your [`SPI`] usage:
 ///
 /// ```no_run
 /// use imxrt_async_hal as hal;
@@ -42,7 +42,7 @@ pub struct Pins<SDO, SDI, SCK, PCS0> {
 /// A `SPI` peripheral uses DMA for asynchronous I/O. Using up to two DMA channels, `SPI` peripherals
 /// can perform SPI device reads, writes, and full-duplex transfers with `u8` and `u16` elements.
 ///
-/// The SPI serial clock speed after construction is unspecified. Use [`set_clock_speed`](#method.set_clock_speed)
+/// The SPI serial clock speed after construction is unspecified. Use [`set_clock_speed`](SPI::set_clock_speed())
 /// to choose your SPI serial clock speed.
 ///
 /// The RAL instances are available in `ral::lpspi`.
@@ -114,7 +114,7 @@ where
 {
     /// Create a `SPI` from a set of pins, a SPI peripheral instance, and two DMA channels
     ///
-    /// See the [`instance` module](instance/index.html) for more information on SPI peripheral
+    /// See the [`instance` module](instance) for more information on SPI peripheral
     /// instances.
     pub fn new(
         mut pins: Pins<SDO, SDI, SCK, PCS0>,
@@ -159,7 +159,7 @@ where
     }
 }
 
-/// Errors propagated from a [`SPI`](struct.SPI.html) device
+/// Errors propagated from a [`SPI`] device
 #[non_exhaustive]
 #[derive(Debug)]
 #[cfg_attr(docsrs, doc(cfg(feature = "spi")))]
@@ -190,7 +190,7 @@ impl<Pins> SPI<Pins> {
     /// Consider calling `set_clock_speed` after creating a `SPI`, since the clock speed after
     /// construction is unspecified.
     ///
-    /// If an error occurs, it's an [`SPIError::ClockSpeed`](enum.SPIError.html#variant.ClockSpeed).
+    /// If an error occurs, it's an [`crate::spi::Error::ClockSpeed`].
     pub fn set_clock_speed(&mut self, hz: u32) -> Result<(), Error> {
         self.with_master_disabled(|| {
             // Safety: master is disabled

src/uart.rs

@@ -6,7 +6,7 @@ use core::fmt;
 /// UART Serial driver
 ///
 /// `UART` can send and receive byte buffers using a transfer / receive two-wire interface.
-/// After constructing a `UART`, the baud rate is unspecified. Use [`set_baud`](#method.set_baud)
+/// After constructing a `UART`, the baud rate is unspecified. Use [`set_baud`](UART::set_baud())
 /// to configure your serial device.
 ///
 /// The RAL instances are available in `ral::lpuart`.
@@ -78,7 +78,7 @@ where
 {
     /// Create a new `UART` from a UART instance, TX and RX pins, and a DMA channel
     ///
-    /// The baud rate of the returned `UART` is unspecified. Make sure you use [`set_baud`](#method.set_baud)
+    /// The baud rate of the returned `UART` is unspecified. Make sure you use [`set_baud`](UART::set_baud())
     /// to properly configure the driver.
     pub fn new(
         uart: crate::instance::UART<M>,
@@ -108,7 +108,7 @@ where
 impl<TX, RX> UART<TX, RX> {
     /// Set the serial baud rate
     ///
-    /// If there is an error, the error is [`Error::Clock`](enum.UARTError.html#variant.Clock).
+    /// If there is an error, the error is [`Error::Clock`](Error::Clock).
     pub fn set_baud(&mut self, baud: u32) -> Result<(), Error> {
         let timings = timings(self.hz, baud)?;
         self.while_disabled(|this| {
@@ -172,7 +172,7 @@ struct Timings {
     sbr: u16,
 }
 
-/// Errors propagated from a [`UART`](struct.UART.html) device
+/// Errors propagated from a [`UART`] device
 #[non_exhaustive]
 #[derive(Debug)]
 #[cfg_attr(docsrs, doc(cfg(feature = "uart")))]