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SAI: audio pll, sai peripheral driver, and small rtic synthesizing sample #143
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,2 @@ | ||
[language-server.rust-analyzer.config] | ||
cargo = { features = ["imxrt1010"], target = "thumbv7em-none-eabihf" } |
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@@ -40,7 +40,18 @@ fn prepare_clock_tree( | |
clock_tree::configure_lpspi(RUN_MODE, ccm); | ||
clock_tree::configure_perclk(RUN_MODE, ccm); | ||
clock_tree::configure_uart(RUN_MODE, ccm); | ||
clock_tree::configure_sai(RUN_MODE, ccm); | ||
ccm::analog::pll3::restart(ccm_analog); | ||
//clock output settings for the audio pll | ||
//24000000*(30 + 72/100)/1 = 737.28MHz | ||
//sai mclk settings then are | ||
//(737280000/5)/6 = 24.576MHz | ||
//sai bclk (for 48kHz 16bit stereo) | ||
//24576kHz/16 = 1536000.000 Hz | ||
//Ideal bclk is (48000*2*16) = 1536000 | ||
//24576kHz/512 = 48kHz | ||
//Ideal frame sync is 48000 | ||
ccm::analog::pll4::reconfigure(ccm_analog, 30, 72, 100, ccm::analog::pll4::PostDivider::U1); | ||
} | ||
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use hal::ccm::clock_gate; | ||
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@@ -53,6 +64,10 @@ const COMMON_CLOCK_GATES: &[clock_gate::Locator] = &[ | |
clock_gate::dma(), | ||
clock_gate::usb(), | ||
clock_gate::trng(), | ||
clock_gate::sai::<1>(), | ||
//#[cfg(not(feature = "imxrt1010"))] | ||
//clock_gate::sai::<2>(), | ||
//clock_gate::sai::<3>(), | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Is this unfinished? There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. It is There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I'm not sure this commented code would work. The I have two ideas that might work:
I prefer the first approach. That should make it easier to introduce a board that doesn't immediately support an SAI example, and there's precedent. |
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clock_gate::snvs_lp(), | ||
clock_gate::snvs_hp(), | ||
]; | ||
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The commit message additionally suggests that this might be WM8960 specific.
Fortunately this is AFAICT usable much more generally. 24.576MHz can often be used for various 48kHz based sampling rates with 16 or 32bit. AKM has nice tables showing this in their datasheets.E.g. AK4452 Tables 3+4/6+7 show this is usable up to hex speed. BICK requirements probably further limit it to 16bit @ 384kHz.