drm/i915/display: PCH display HPD IRQ is not detected with default fi…

…lter value

On TGP, the RTC (always running) was reduced from 3MHz to 32KHz.
As a result of this change, when HPD active going low pulse or HPD IRQ
is presented and the refclk (19.2MHz) is not toggling already toggling,
there is a 60 to 90us synchronization delay which effectively reduces
the duration of the IRQ pulse to less than the programmed 500us filter
value and the hot plug interrupt is NOT registered.
Program 0xC7204 (PP_CONTROL) bit #0 to '1' to enable workaround and clear
to disable it.
Driver shall enable this WA when external display is connected and
remove WA when display is unplugged or before going into sleep to allow
CS entry.
Driver shall not enable WA when eDP is connected.
Wa_1508796671:adls

Cc: Arun Murthy <arun.r.murthy@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>

drivers/gpu/drm/i915/display/intel_dp.c

@@ -4740,6 +4740,7 @@ intel_dp_detect(struct drm_connector *connector,
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	struct intel_encoder *encoder = &dig_port->base;
 	enum drm_connector_status status;
+	int32_t pp;
 
 	drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
 		    connector->base.id, connector->name);
@@ -4843,6 +4844,22 @@ intel_dp_detect(struct drm_connector *connector,
 						 status,
 						 intel_dp->dpcd,
 						 intel_dp->downstream_ports);
+
+	/*
+	 * WA_150879661:adls
+	 * Driver shall enable this WA when external display is connected
+	 * and remove WA when display is unplugged
+	 */
+	if (IS_ALDERLAKE_S(dev_priv)) {
+		if (status == connector_status_connected &&
+		    !dev_priv->edp_present)
+			pp = PANEL_POWER_ON;
+		else if (status == connector_status_disconnected)
+			pp = 0;
+
+		intel_de_rmw(dev_priv, _MMIO(PCH_PPS_BASE + 4), 1, pp);
+	}
+
 	return status;
 }
 
@@ -5540,6 +5557,8 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
 	if (!intel_edp_init_connector(intel_dp, intel_connector)) {
 		intel_dp_aux_fini(intel_dp);
 		goto fail;
+	} else {
+		dev_priv->edp_present = true;
 	}
 
 	intel_dp_set_source_rates(intel_dp);

drivers/gpu/drm/i915/display/intel_pps.c

@@ -1727,4 +1727,5 @@ void assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
 	I915_STATE_WARN(panel_pipe == pipe && locked,
 			"panel assertion failure, pipe %c regs locked\n",
 			pipe_name(pipe));
+
 }

drivers/gpu/drm/i915/i915_drv.h

@@ -352,6 +352,8 @@ struct drm_i915_private {
 	/* The TTM device structure. */
 	struct ttm_device bdev;
 
+	bool edp_present;
+
 	I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;)
 
 	/*