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Try to access RAM with the largest bit width possible, but without doing unaligned accesses. A further improvement could be to use multiple read and writes as the assembly version was trying to do. Tested on a BeagleV Starlight with a SiFive U74 core, where the improvement is noticeable. Signed-off-by: Matteo Croce <mcroce@microsoft.com> Co-developed-by: Guo Ren <guoren@linux.alibaba.com> Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
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@@ -4,5 +4,4 @@ obj-y += bswapdi.o | |
obj-y += bswapsi.o | ||
obj-y += cacheflush.o | ||
obj-y += mmap.o | ||
obj-y += memcpy.o | ||
obj-y += strksyms.o |
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@@ -1,3 +1,6 @@ | ||
# SPDX-License-Identifier: GPL-2.0-only | ||
lib-y := usercopy.o delay.o | ||
obj-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o | ||
ifneq ($(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS), y) | ||
lib-y += string.o | ||
endif |
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