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| Original file line number | Diff line number | Diff line change |
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| ; | ||
| ; Copyright (c) 2011 Intel Corporation | ||
| ; Copyright (c) 2018 Alexandro Sanchez Bach <alexandro@phi.nz> | ||
| ; | ||
| ; Redistribution and use in source and binary forms, with or without | ||
| ; modification, are permitted provided that the following conditions are met: | ||
| ; | ||
| ; 1. Redistributions of source code must retain the above copyright notice, | ||
| ; this list of conditions and the following disclaimer. | ||
| ; | ||
| ; 2. Redistributions in binary form must reproduce the above copyright | ||
| ; notice, this list of conditions and the following disclaimer in the | ||
| ; documentation and/or other materials provided with the distribution. | ||
| ; | ||
| ; 3. Neither the name of the copyright holder nor the names of its | ||
| ; contributors may be used to endorse or promote products derived from | ||
| ; this software without specific prior written permission. | ||
| ; | ||
| ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||
| ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
| ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
| ; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | ||
| ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | ||
| ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | ||
| ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | ||
| ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
| ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | ||
| ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
| ; POSSIBILITY OF SUCH DAMAGE. | ||
|
|
||
| ; | ||
| ; Detect architecture | ||
| ; | ||
| %ifidn __OUTPUT_FORMAT__, elf32 | ||
| %define __BITS__ 32 | ||
| %define __CONV__ x32_fastcall | ||
| %elifidn __OUTPUT_FORMAT__, win32 | ||
| %define __BITS__ 32 | ||
| %define __CONV__ x32_fastcall | ||
| %elifidn __OUTPUT_FORMAT__, macho32 | ||
| %define __BITS__ 32 | ||
| %define __CONV__ x32_fastcall | ||
| %elifidn __OUTPUT_FORMAT__, elf64 | ||
| %define __BITS__ 64 | ||
| %define __CONV__ x64_systemv | ||
| %elifidn __OUTPUT_FORMAT__, win64 | ||
| %define __BITS__ 64 | ||
| %define __CONV__ x64_microsoft | ||
| %elifidn __OUTPUT_FORMAT__, macho64 | ||
| %define __BITS__ 64 | ||
| %define __CONV__ x64_systemv | ||
| %endif | ||
|
|
||
| ; | ||
| ; Describe calling convention | ||
| ; | ||
| %ifidn __CONV__, x32_fastcall | ||
| %define reg_arg1_16 cx | ||
| %define reg_arg1_32 ecx | ||
| %define reg_arg1 reg_arg1_32 | ||
| %define reg_arg2_16 dx | ||
| %define reg_arg2_32 edx | ||
| %define reg_arg2 reg_arg2_32 | ||
| %define reg_ret_16 ax | ||
| %define reg_ret_32 eax | ||
| %define reg_ret reg_ret_32 | ||
| %elifidn __CONV__, x64_systemv | ||
| %define reg_arg1_16 di | ||
| %define reg_arg1_32 edi | ||
| %define reg_arg1_64 rdi | ||
| %define reg_arg1 reg_arg1_64 | ||
| %define reg_arg2_16 si | ||
| %define reg_arg2_32 esi | ||
| %define reg_arg2_64 rsi | ||
| %define reg_arg2 reg_arg2_64 | ||
| %define reg_ret_16 ax | ||
| %define reg_ret_32 eax | ||
| %define reg_ret_64 rax | ||
| %define reg_ret reg_ret_64 | ||
| %elifidn __CONV__, x64_microsoft | ||
| %define reg_arg1_16 cx | ||
| %define reg_arg1_32 ecx | ||
| %define reg_arg1_64 rcx | ||
| %define reg_arg1 reg_arg1_64 | ||
| %define reg_arg2_16 cx | ||
| %define reg_arg2_32 ecx | ||
| %define reg_arg2_64 rcx | ||
| %define reg_arg2 reg_arg2_64 | ||
| %define reg_ret_16 ax | ||
| %define reg_ret_32 eax | ||
| %define reg_ret_64 rax | ||
| %define reg_ret reg_ret_64 | ||
| %endif | ||
|
|
||
| ; | ||
| ; Helpers | ||
| ; | ||
| %macro function 1 | ||
| global %1 | ||
| %1: | ||
| %endmacro | ||
|
|
||
| %macro function_get_reg 1 | ||
| function get_%+%1 | ||
| mov reg_ret, %1 | ||
| ret | ||
| %endmacro | ||
| %macro function_set_reg 1 | ||
| function set_%+%1 | ||
| mov %1, reg_arg1 | ||
| ret | ||
| %endmacro | ||
| %macro function_get_segment 1 | ||
| function get_kernel_%+%1 | ||
| mov reg_ret_16, %1 | ||
| ret | ||
| %endmacro | ||
| %macro function_set_segment 1 | ||
| function set_kernel_%+%1 | ||
| mov %1, reg_arg1_16 | ||
| ret | ||
| %endmacro | ||
|
|
||
| section .text | ||
|
|
||
| struc qword_struct | ||
| .lo resd 1 | ||
| .hi resd 1 | ||
| endstruc | ||
|
|
||
| struc vcpu_state | ||
| ._rax resq 1 | ||
| ._rcx resq 1 | ||
| ._rdx resq 1 | ||
| ._rbx resq 1 | ||
| ._rsp resq 1 | ||
| ._rbp resq 1 | ||
| ._rsi resq 1 | ||
| ._rdi resq 1 | ||
| ._r8 resq 1 | ||
| ._r9 resq 1 | ||
| ._r10 resq 1 | ||
| ._r11 resq 1 | ||
| ._r12 resq 1 | ||
| ._r13 resq 1 | ||
| ._r14 resq 1 | ||
| ._r15 resq 1 | ||
| endstruc | ||
|
|
||
| struc cpuid_args | ||
| ._eax resd 1 | ||
| ._ecx resd 1 | ||
| ._edx resd 1 | ||
| ._ebx resd 1 | ||
| endstruc | ||
|
|
||
| function __nmi | ||
| int 2h | ||
| ret | ||
|
|
||
| function __fls | ||
| bsr eax, ecx | ||
| ret | ||
|
|
||
| function __handle_cpuid | ||
| %ifidn __BITS__, 64 | ||
| push rbx | ||
| mov r8, rcx | ||
| mov rax, [r8 + vcpu_state._rax] | ||
| mov rcx, [r8 + vcpu_state._rcx] | ||
| cpuid | ||
| mov [r8 + vcpu_state._rax], rax | ||
| mov [r8 + vcpu_state._rbx], rbx | ||
| mov [r8 + vcpu_state._rcx], rcx | ||
| mov [r8 + vcpu_state._rdx], rdx | ||
| pop rbx | ||
| ret | ||
| %else | ||
| push ebx | ||
| push esi | ||
| mov esi, reg_arg1 | ||
| mov eax, [esi + vcpu_state._rax] | ||
| mov ecx, [esi + vcpu_state._rcx] | ||
| cpuid | ||
| mov [esi + vcpu_state._rax], eax | ||
| mov [esi + vcpu_state._rbx], ebx | ||
| mov [esi + vcpu_state._rcx], ecx | ||
| mov [esi + vcpu_state._rdx], edx | ||
| pop esi | ||
| pop ebx | ||
| ret | ||
| %endif | ||
|
|
||
| function asm_btr | ||
| lock btr [reg_arg1], reg_arg2 | ||
| ret | ||
|
|
||
| function asm_bts | ||
| lock bts [reg_arg1], reg_arg2 | ||
| ret | ||
|
|
||
| function asm_disable_irq | ||
| cli | ||
| ret | ||
|
|
||
| function asm_enable_irq | ||
| sti | ||
| ret | ||
|
|
||
| function asm_fxinit | ||
| finit | ||
| ret | ||
|
|
||
| function asm_fxrstor | ||
| fxrstor [reg_arg1] | ||
| ret | ||
|
|
||
| function asm_fxsave | ||
| fxsave [reg_arg1] | ||
| ret | ||
|
|
||
| function asm_rdmsr | ||
| %ifidn __BITS__, 64 | ||
| mov rcx, reg_arg1 | ||
| rdmsr | ||
| shl rdx, 32 | ||
| or rax, rdx | ||
| ret | ||
| %else | ||
| mov ecx, reg_arg1 | ||
| rdmsr | ||
| mov [reg_arg2 + qword_struct.lo], eax | ||
| mov [reg_arg2 + qword_struct.hi], edx | ||
| ret | ||
| %endif | ||
|
|
||
| function asm_rdtsc | ||
| %ifidn __BITS__, 64 | ||
| rdtsc | ||
| shl rdx, 32 | ||
| or rax, rdx | ||
| ret | ||
| %else | ||
| rdtsc | ||
| mov [reg_arg2 + qword_struct.lo], eax | ||
| mov [reg_arg2 + qword_struct.hi], edx | ||
| ret | ||
| %endif | ||
|
|
||
| function asm_wrmsr | ||
| %ifidn __BITS__, 64 | ||
| push rbx | ||
| mov rbx, reg_arg2 | ||
| mov rcx, reg_arg1 | ||
| mov eax, ebx | ||
| mov rdx, rbx | ||
| shl rdx, 32 | ||
| wrmsr | ||
| push rbx | ||
| ret | ||
| %else | ||
| push edi | ||
| push esi | ||
| mov edi, [reg_arg2 + qword_struct.lo] | ||
| mov esi, [reg_arg2 + qword_struct.hi] | ||
| mov ecx, reg_arg1 | ||
| mov eax, edi | ||
| mov edx, esi | ||
| wrmsr | ||
| push esi | ||
| push edi | ||
| ret | ||
| %endif | ||
|
|
||
| function get_kernel_rflags | ||
| pushf | ||
| pop ax | ||
| ret | ||
|
|
||
| function_get_reg cr0 | ||
| function_get_reg cr2 | ||
| function_get_reg cr3 | ||
| function_get_reg cr4 | ||
| function_get_reg dr0 | ||
| function_get_reg dr1 | ||
| function_get_reg dr2 | ||
| function_get_reg dr3 | ||
| function_get_reg dr6 | ||
| function_get_reg dr7 | ||
|
|
||
| function_set_reg cr0 | ||
| function_set_reg cr2 | ||
| function_set_reg cr3 | ||
| function_set_reg cr4 | ||
| function_set_reg dr0 | ||
| function_set_reg dr1 | ||
| function_set_reg dr2 | ||
| function_set_reg dr3 | ||
| function_set_reg dr6 | ||
| function_set_reg dr7 | ||
|
|
||
| function_get_segment cs | ||
| function_get_segment ds | ||
| function_get_segment es | ||
| function_get_segment ss | ||
| function_get_segment gs | ||
| function_get_segment fs | ||
|
|
||
| function_set_segment cs | ||
| function_set_segment ds | ||
| function_set_segment es | ||
| function_set_segment ss | ||
| function_set_segment gs | ||
| function_set_segment fs |
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