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Adding aux clock outputs to sim infra #72

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dmnewbold opened this issue Oct 7, 2018 · 1 comment
Closed

Adding aux clock outputs to sim infra #72

dmnewbold opened this issue Oct 7, 2018 · 1 comment
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@dmnewbold
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enhancement
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Release 1.3

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@dmnewbold
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Useful for instantiating payload with no sim dependencies. Clock frequency must be configurable.
@dmnewbold dmnewbold self-assigned this Oct 7, 2018
@tswilliams tswilliams added this to the Release 1.3 milestone Oct 18, 2018
@tswilliams tswilliams mentioned this issue Oct 18, 2018
Merged
tswilliams pushed a commit that referenced this issue Oct 18, 2018
@dmnewbold @tswilliams
Adding variable aux clock frequency; refs #72
e559d03
tswilliams pushed a commit that referenced this issue Oct 18, 2018
@dmnewbold @tswilliams
Adding variable aux clock frequency; refs #72
3a40ce0
tswilliams pushed a commit that referenced this issue Oct 18, 2018
@dmnewbold @tswilliams
Fixing VHDL time problems; refs #72
6bbf705
@tswilliams
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All done; closing.

alessandrothea pushed a commit that referenced this issue Dec 5, 2018
@dmnewbold @alessandrothea
Adding variable aux clock frequency; refs #72
9503ff1
alessandrothea pushed a commit that referenced this issue Dec 5, 2018
@dmnewbold @alessandrothea
Adding variable aux clock frequency; refs #72
d7cfd9a
alessandrothea pushed a commit that referenced this issue Dec 5, 2018
@dmnewbold @alessandrothea
Fixing VHDL time problems; refs #72
6167a07
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@tswilliams @dmnewbold