Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[romprefix] Allow to enforce PnP BIOSes to be detected as non-PnP #16

Closed
wants to merge 1 commit into from

Conversation

stefanct
Copy link

Add a define NONPNP_FORCE that controls building of the PnP detection
routine. Together with the existing NONPNP_HOOK_INT19 hook this enables
booting iPXE on PnP BIOSes that can not be persuaded to boot iPXE by
BIOS menu configuration alone (e.g. my abit BX6 2.0).

Signed-off-by: Stefan Tauner stefan.tauner@gmx.at

Add a define NONPNP_FORCE that controls building of the PnP detection
routine. Together with the existing NONPNP_HOOK_INT19 hook this enables
booting iPXE on PnP BIOSes that can not be persuaded to boot iPXE by
BIOS menu configuration alone (e.g. my abit BX6 2.0).

Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
mcb30 added a commit that referenced this pull request Dec 6, 2013
…tion

The vgabios used by bochs and qemu (and other virtualisation products)
has a bug in its implementation of INT 10,4f00 which causes the high
16 bits of %ebx and %edx to become corrupted.

The vgabios code uses a "pushaw"/"popaw" pair to preserve the low 16
bits of all non-segment registers.  The vgabios code is compiled using
bcc, which generates 8086-compatible code and so never touches the
high 16 bits of the 32-bit registers.  However, the function
vbe_biosfn_return_controller_information() includes the line:

    size_64k = (Bit16u)((Bit32u)cur_info->info.XResolution *
				cur_info->info.XResolution *
				cur_info->info.BitsPerPixel) >> 19;

which generates an implicit call to the "lmulul" function.  This
function is implemented in vbe.c as:

    ; helper function for memory size calculation
    lmulul:
      and eax, #0x0000FFFF
      shl ebx, #16
      or  eax, ebx
      SEG SS
      mul eax, dword ptr [di]
      mov ebx, eax
      shr ebx, #16
      ret

which modifies %eax, %ebx, and %edx (as a result of the "mul"
instruction, which places its result into %edx:%eax).

Work around this problem by marking %ebx and %edx as being clobbered
by the call to INT 10,4f00.  (%eax is already used as an output
register, so does not need to be on the clobber list.)

Reported-by: Oliver Rath <rath@mglug.de>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
@mcb30
Copy link
Member

mcb30 commented Feb 7, 2022

It's been a very long time (sorry) but: I would prefer not to include this unless it can be demonstrated that there is no better way to achieve the goal. Adding #ifdef MY_PET_FEATURE is generally something I try hard to avoid.

In this case, I'd need to be convinced that the BIOS in question is detected as PnP by iPXE's romprefix.S (i.e. that the existing NONPNP_HOOK_INT19 is insufficient), and that the BIOS is genuinely too broken to allow for booting from PnP option ROMs. For example: if the BIOS can be demonstrated to fail to boot from a very standard option ROM (e.g. a NIC containing a known-working Intel PXE ROM) then that would be convincing evidence.

Closing this PR on the assumption that it is unlikely to receive any further attention after such a long delay, but please do reopen if it is still relevant.

@mcb30 mcb30 closed this Feb 7, 2022
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

None yet

2 participants