Cloned the MCore code generator as the VC4 one.

config.sub

@@ -356,6 +356,11 @@ case $basic_machine in
 		basic_machine=armel-unknown
 		;;
 
+	vc4)
+		basic_machine=vc4-unknown
+		os=-elf
+		;;
+
 	# We use `pc' rather than `unknown'
 	# because (1) that's what they normally are, and
 	# (2) the word "unknown" tends to confuse beginning users.
@@ -443,6 +448,7 @@ case $basic_machine in
 	| ubicom32-* \
 	| v850-* | v850e-* | v850e1-* | v850es-* | v850e2-* | v850e2v3-* \
 	| vax-* \
+	| vc4-* \
 	| visium-* \
 	| we32k-* \
 	| x86-* | x86_64-* | xc16x-* | xps100-* \

gcc/common/config/vc4/vc4-common.c

@@ -0,0 +1,53 @@
+/* Common hooks for Motorola MCore.
+   Copyright (C) 1993-2013 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with GCC; see the file COPYING3.  If not see
+   <http://www.gnu.org/licenses/>.  */
+
+#include "config.h"
+#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "common/common-target.h"
+#include "common/common-target-def.h"
+
+/* What options are we going to default to specific settings when
+   -O* happens; the user can subsequently override these settings.
+  
+   Omitting the frame pointer is a very good idea on the MCore.
+   Scheduling isn't worth anything on the current MCore implementation.  */
+
+static const struct default_options mcore_option_optimization_table[] =
+  {
+    { OPT_LEVELS_1_PLUS, OPT_ffunction_cse, NULL, 0 },
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
+    { OPT_LEVELS_ALL, OPT_fcaller_saves, NULL, 0 },
+    { OPT_LEVELS_ALL, OPT_fschedule_insns, NULL, 0 },
+    { OPT_LEVELS_ALL, OPT_fschedule_insns2, NULL, 0 },
+    { OPT_LEVELS_SIZE, OPT_mhardlit, NULL, 0 },
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
+  };
+
+#undef  TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS	TARGET_DEFAULT
+
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
+#define TARGET_OPTION_OPTIMIZATION_TABLE mcore_option_optimization_table
+
+#undef TARGET_EXCEPT_UNWIND_INFO
+#define TARGET_EXCEPT_UNWIND_INFO sjlj_except_unwind_info
+
+struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;

gcc/config.gcc

@@ -3053,6 +3053,11 @@ m32c-*-elf*)
 	c_target_objs="m32c-pragma.o"
 	cxx_target_objs="m32c-pragma.o"
  	;;
+vc4-*-elf*)
+	tm_file="dbxelf.h elfos.h newlib-stdint.h ${tm_file} vc4/vc4-elf.h"
+	tmake_file=vc4/t-vc4
+	inhibit_libc=true
+	;;
 *)
 	echo "*** Configuration ${target} not supported" 1>&2
 	exit 1

gcc/config/vc4/constraints.md

@@ -0,0 +1,111 @@
+;; Constraint definitions for the Motorola MCore
+;; Copyright (C) 2011-2013 Free Software Foundation, Inc.
+
+;; This file is part of GCC.
+
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 3, or (at your option)
+;; any later version.
+
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3.  If not see
+;; <http://www.gnu.org/licenses/>.
+
+;; Register constraints.
+(define_register_constraint "a" "LRW_REGS"
+  "@internal")
+
+(define_register_constraint "b" "ONLYR1_REGS"
+  "@internal")
+
+(define_register_constraint "c" "C_REGS"
+  "@internal")
+
+(define_register_constraint "x" "ALL_REGS"
+  "@internal")
+
+;; Integer constraints.
+(define_constraint "I"
+  "An integer in the range 0 to 127."
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, 0, 127)")))
+
+(define_constraint "J"
+  "An integer in the range 1 to 32."
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, 1, 32)")))
+
+(define_constraint "K"
+  "A shift operand, an integer in the range 0 to 31."
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, 0, 31)")))
+
+(define_constraint "L"
+  "A negative arithmetic operand in the range -32 to -1."
+  (and (match_code "const_int")
+       (match_test "IN_RANGE (ival, -32, -1)")))
+
+(define_constraint "M"
+  "A constant loadable by bgeni."
+  (and (match_code "const_int")
+       (match_test "exact_log2 (ival) >= 0 && exact_log2 (ival) <= 30")))
+
+(define_constraint "N"
+  "A constant loadable by bmaskii, including -1."
+  (and (match_code "const_int")
+       (ior (match_test "ival == -1")
+	    (and (match_test "exact_log2 (ival + 1) >= 0")
+		 (match_test "exact_log2 (ival + 1) <= 30")))))
+
+(define_constraint "O"
+  "A constant allowed by cmov with two constants +/- 1 of each other."
+  (and (match_code "const_int")
+       (ior (match_test "insn_const_int_ok_for_constraint (ival, CONSTRAINT_I)")
+	    (match_test "insn_const_int_ok_for_constraint (ival, CONSTRAINT_M)")
+	    (match_test "insn_const_int_ok_for_constraint (ival, CONSTRAINT_N)")
+	    (match_test "insn_const_int_ok_for_constraint (ival - 1, CONSTRAINT_M)")
+	    (match_test "insn_const_int_ok_for_constraint (ival + 1, CONSTRAINT_N)"))))
+
+(define_constraint "P"
+  "A value that can be generated without an lrw instruction."
+  (and (match_code "const_int")
+       (match_test "mcore_const_ok_for_inline (ival)")))
+
+;; Floating-point constraints.
+(define_constraint "G"
+  "@internal"
+  (and (match_code "const_double")
+       (match_test "insn_const_int_ok_for_constraint (hval, CONSTRAINT_I)")
+       (match_test "insn_const_int_ok_for_constraint (ival, CONSTRAINT_I)")))
+
+;; Other constraints.
+(define_constraint "Q"
+  "The integer constant one."
+  (and (match_code "const_int")
+       (match_test "ival == 1")))
+
+(define_constraint "R"
+  "@internal"
+  (and (match_code "mem")
+       (match_test "GET_CODE (XEXP (op, 0)) == LABEL_REF")))
+
+(define_constraint "S"
+  "An integer constant with 0, 1, or 2 bits clear."
+  (and (match_code "const_int")
+       (match_test "mcore_num_zeros (ival) <= 2")))
+
+(define_constraint "T"
+  "An integer constant with 2 set bits."
+  (and (match_code "const_int")
+       (match_test "mcore_num_ones (ival) == 2")))
+
+(define_constraint "U"
+  "The integer constant zero."
+  (and (match_code "const_int")
+       (match_test "ival == 0")))