jackkoenig
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June 2023
Created 5 commits in 1 repository
Created a pull request in chipsalliance/chisel that received 3 comments
Warn on incorrect widths for Vec dynamic indexing
Follow on to #3033, applying the same change to Vec dynamic indices (previously it was just dynamic bit selection for UInts). Contributor Checklist …
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chipsalliance/chisel
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- Add tests for using DataView with ref types
- Convert Vec dynamic index with a literal to static index
- Implement a SyncReadMem wrapper with explicit read, write, and read/write ports
- Unify recursive Data traversals into DataMirror
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Don't emit implicit clock warnings for
SyncReadMem.readWritewhen explicit clocks are used