added bootgen for reliable zybo support. Added new C.fifo generator a…

…nd RS.fifo

examples/examplescommon.lua

@@ -670,7 +670,18 @@ C.stencilLinebufferPartialOffsetOverlap = memoize(function( A, w, h, T, xmin, xm
 end)
 
 -------------
-function C.fifo(fifos,statements,A,inp,size,name, csimOnly, X)
+C.fifo = memoize(function(ty,size)
+  err( types.isType(ty), "C.fifo: type must be a type" )
+  err( R.isBasic(ty), "C.fifo: type must be basic type" )
+  err( type(size)=="number" and size>0, "C.fifo: size must be number > 0" )
+  local inp = R.input(R.Handshake(ty))
+  local regs = {R.instantiateRegistered("f1",RM.fifo(ty,size))}
+  return RM.lambda("C_FIFO_"..tostring(ty).."_size"..tostring(size), inp, R.statements{R.applyMethod("l1",regs[1],"load"),R.applyMethod("s1",regs[1],"store",inp)}, regs, "C.fifo", {size=size} )
+end)
+
+-------------
+-- FIFO with loop support
+function C.fifoLoop(fifos,statements,A,inp,size,name, csimOnly, X)
   assert(type(name)=="string")
   assert(X==nil)
 

examples/featuredescriptor.lua

@@ -21,7 +21,7 @@ FILTER_TYPE = R.tuple{ R.array2d( DXDY_TYPE, TILES_X*4, TILES_Y*4 ), POS_TYPE }
 filterSeqOut = R.connect{ input = harrisOut, toModule = R.HS(R.modules.filterSeq{ 
   type=FILTER_TYPE, size={W,H}, rate=FILTER_RATE, fifoSize=FILTER_FIFO }) }
 
-filterSeqOut = R.fifo{ input = filterSeqOut, depth = 512, fifoList = fifoList }
+filterSeqOut = R.fifoLoop{ input = filterSeqOut, depth = 512, fifoList = fifoList }
 
 -----------------------------------
 -- fan out filterSeq result to store position along a side branch
@@ -30,7 +30,7 @@ branch0, branch1 = R.fanOut{ input = filterSeqOut, branches = 2 }
 -----------------------------------
 -- branch 0: hold pixel position of feature until we need it later
 branch0_pos = R.index{ input = branch0, key = 1 }
-branch0_pos = R.fifo{ input = branch0_pos, depth = 1024, fifoList = fifoList }
+branch0_pos = R.fifoLoop{ input = branch0_pos, depth = 1024, fifoList = fifoList }
 
 -----------------------------------
 -- branch 1: calculate feature descriptor
@@ -55,7 +55,7 @@ branch1_desc = R.connect{ input=branch1_pixels, toModule=R.HS(descriptor.descrip
 branch1_hist = R.connect{ input = branch1_desc, toModule = 
   R.HS( R.modules.reduceSeq{ fn = descriptor.histogramReduce, V=16}) }
 
-branch1_hist = R.fifo{ input = branch1_hist, depth = 128, fifoList = fifoList }
+branch1_hist = R.fifoLoop{ input = branch1_hist, depth = 128, fifoList = fifoList }
 
 -- Devectorize 8 histogram buckets into individual values to sum them
 branch1_histbucket = R.connect{ input = branch1_hist, toModule = 
@@ -67,7 +67,7 @@ branch2, branch3 = R.fanOut{ input = branch1_histbucket, branches = 2 }
 
 -----------------------------------
 -- branch 2: sum of squares
-branch2 = R.fifo{ input = branch2, depth = 256, fifoList = fifoList }
+branch2 = R.fifoLoop{ input = branch2, depth = 256, fifoList = fifoList }
 
 -- sum all 128 histogram buckets
 branch2_sum = R.connect{ input = branch2, toModule = 
@@ -84,7 +84,7 @@ branch2_sum = R.connect{ input = branch2_sumsqrt, toModule =
 
 -----------------------------------
 -- branch 3: Normalize the descriptor values (depends on branch 2)
-branch3 = R.fifo{ input = branch3, depth = 256, fifoList = fifoList }
+branch3 = R.fifoLoop{ input = branch3, depth = 256, fifoList = fifoList }
 
 -- divide each 128 histogram bucket value by the sum of the buckets
 branch3 = R.connect{input=R.fanIn{branch3,branch2_sum},toModule=descriptor.normalize}
@@ -104,4 +104,4 @@ descriptorPipeline = R.defineModule{ input=inp, output=desc, fifoList=fifoList }
 R.harness{ fn = descriptorPipeline, 
             inFile = "boxanim_256.raw", inSize = {W,H},
             outFile = "featuredescriptor", outSize = {W*H*FILTER_RATE*130, 1} }
-
+

examples/harris_core.lua

@@ -189,7 +189,7 @@ function harris.harrisWithStencil(t)
   -------------------------------
   -- right branch: make the harris bool
   local right = R.selectStream("d1",dxdyBroad,1)
-  right = C.fifo( fifos, statements, DXDY_PAIR, right, 128, "rightFIFO")
+  right = C.fifoLoop( fifos, statements, DXDY_PAIR, right, 128, "rightFIFO")
 
   local harrisFn, harrisType = harris.makeHarrisKernel(dxdyType,dxdyType)
   local right = R.apply("harris", RM.makeHandshake(harrisFn), right)
@@ -213,7 +213,7 @@ function harris.harrisWithStencil(t)
     --print("GRAD_INT=false")
   end
 
-  left = C.fifo( fifos, statements, DXDY_PAIR, left, 2048/DXDY_PAIR:verilogBits(), "leftFIFO")
+  left = C.fifoLoop( fifos, statements, DXDY_PAIR, left, 2048/DXDY_PAIR:verilogBits(), "leftFIFO")
 
   local left = R.apply("stlbinp", RM.makeHandshake(C.arrayop(DXDY_PAIR,1,1)), left)
   local left = R.apply( "stlb", RM.makeHandshake(C.stencilLinebuffer(DXDY_PAIR, internalW, internalH, 1,-TILES_X*4+1,0,-TILES_Y*4+1,0)), left)

examples/sift_core.lua

@@ -256,17 +256,17 @@ local function siftKernel(dxdyType)
   local inp = R.input(R.Handshake(ITYPE))
   local inp_broad = R.apply("inp_broad", RM.broadcastStream(ITYPE,2), inp)
 
-  local inp_pos = C.fifo( fifos, statements, ITYPE, R.selectStream("i0",inp_broad,0), 1, "p0", true)
+  local inp_pos = C.fifoLoop( fifos, statements, ITYPE, R.selectStream("i0",inp_broad,0), 1, "p0", true)
   local pos = R.apply("p",RM.makeHandshake(C.index(ITYPE,1)), inp_pos)
-  local pos = C.fifo( fifos, statements, PTYPE, pos, 1024, "posfifo")
+  local pos = C.fifoLoop( fifos, statements, PTYPE, pos, 1024, "posfifo")
   local posL, posR = RS.fanOut{input=pos,branches=2}
 --  local pos = C.fifo( fifos, statements, PTYPE, pos, 1024, "p0")
   local posX = R.apply("px",RM.makeHandshake(C.index(PTYPE,0)),posL)
-  local posX = C.fifo( fifos, statements, posType, posX, 1024, "pxfifo" )
+  local posX = C.fifoLoop( fifos, statements, posType, posX, 1024, "pxfifo" )
   local posY = R.apply("py",RM.makeHandshake(C.index(PTYPE,1)),posR)
-  local posY = C.fifo( fifos, statements, posType, posY, 1024, "pyfifo" )
+  local posY = C.fifoLoop( fifos, statements, posType, posY, 1024, "pyfifo" )
 
-  local inp_dxdy = C.fifo( fifos, statements, ITYPE, R.selectStream("i1",inp_broad,1), 1, "p1", true)
+  local inp_dxdy = C.fifoLoop( fifos, statements, ITYPE, R.selectStream("i1",inp_broad,1), 1, "p1", true)
   local dxdy = R.apply("dxdy",RM.makeHandshake(C.index(ITYPE,0,0)), inp_dxdy)
   local dxdyTile = R.apply("TLE",RM.makeHandshake(tile(16,16,4,dxdyPair)),dxdy)
   local dxdy = R.apply( "down1", RM.liftHandshake(RM.changeRate(types.array2d(dxdyPair,16),1,16,1)), dxdyTile )
@@ -281,7 +281,7 @@ local function siftKernel(dxdyType)
   -- it seems like we shouldn't need a FIFO here, but we do: the changeRate downstream will only be ready every 1/8 cycles.
   -- We need a tiny fifo to hold the reduceseq output, to keep it from stalling. (the scheduling isn't smart enough to know
   -- that reduceSeq only has an output every 16 cycles, so it can't overlap them)
-  local desc = C.fifo(fifos,statements,types.array2d(descType,8),desc,1,"lol",true)
+  local desc = C.fifoLoop(fifos,statements,types.array2d(descType,8),desc,1,"lol",true)
 
   local desc = R.apply("up",RM.liftHandshake(RM.changeRate(descType,1,8,1),"CR"),desc)
   local desc = R.apply("upidx",RM.makeHandshake(C.index(types.array2d(descType,1),0,0)), desc)
@@ -290,10 +290,10 @@ local function siftKernel(dxdyType)
   local desc_broad = R.apply("desc_broad", RM.broadcastStream(descType,2), desc)
 
   local desc0 = R.selectStream("d0",desc_broad,0)
-  local desc0 = C.fifo( fifos, statements, descType, desc0, 256, "d0")
+  local desc0 = C.fifoLoop( fifos, statements, descType, desc0, 256, "d0")
 
   local desc1 = R.selectStream("d1",desc_broad,1)
-  local desc1 = C.fifo( fifos, statements, descType, desc1, 256, "d1")
+  local desc1 = C.fifoLoop( fifos, statements, descType, desc1, 256, "d1")
 
   local desc_sum = R.apply("sum",RM.liftHandshake(RM.liftDecimate(RM.reduceSeq(fixedSumPow2(descType),1/128))),desc1)
   local desc_sum = R.apply("sumsqrt",RM.makeHandshake(fixedSqrt(descType)), desc_sum)
@@ -448,7 +448,7 @@ function sift.siftTop(W,H,T,FILTER_RATE,FILTER_FIFO,X)
   local filterFn = RM.filterSeq(FILTER_TYPE,W,H,{1,FILTER_RATE},FILTER_FIFO)
 
   local out = R.apply("FS",RM.liftHandshake(RM.liftDecimate(filterFn)),out)
-  local out = C.fifo( fifos, statements, FILTER_TYPE, out, FILTER_FIFO, "fsfifo", true)
+  local out = C.fifoLoop( fifos, statements, FILTER_TYPE, out, FILTER_FIFO, "fsfifo", true)
 
   local siftFn, descType = siftKernel(dxdyType)
   local out = R.apply("sft", siftFn, out)

examples/sift_core_hw.lua

@@ -297,18 +297,18 @@ function sift.siftKernel(dxdyType)
   local inp = R.input(R.Handshake(ITYPE))
   local inp_broad = R.apply("inp_broad", RM.broadcastStream(ITYPE,2), inp)
 
-  local inp_pos = C.fifo( fifos, statements, ITYPE, R.selectStream("i0",inp_broad,0), 1, "p0", true) -- fifo size can also be 1 (tested in SW)
+  local inp_pos = C.fifoLoop( fifos, statements, ITYPE, R.selectStream("i0",inp_broad,0), 1, "p0", true) -- fifo size can also be 1 (tested in SW)
   local pos = R.apply("p",RM.makeHandshake(C.index(ITYPE,1)), inp_pos)
-  local pos = C.fifo( fifos, statements, PTYPE, pos, 1024, "posfifo")
+  local pos = C.fifoLoop( fifos, statements, PTYPE, pos, 1024, "posfifo")
   local pos0, pos1 = RS.fanOut{input=pos,branches=2}
 
 --  local pos = C.fifo( fifos, statements, PTYPE, pos, 1024, "p0")
   local posX = R.apply("px",RM.makeHandshake(C.index(PTYPE,0)),pos0)
-  local posX = C.fifo( fifos, statements, posType, posX, 1024, "pxfifo" )
+  local posX = C.fifoLoop( fifos, statements, posType, posX, 1024, "pxfifo" )
   local posY = R.apply("py",RM.makeHandshake(C.index(PTYPE,1)),pos1)
-  local posY = C.fifo( fifos, statements, posType, posY, 1024, "pyfifo" )
+  local posY = C.fifoLoop( fifos, statements, posType, posY, 1024, "pyfifo" )
 
-  local inp_dxdy = C.fifo( fifos, statements, ITYPE, R.selectStream("i1",inp_broad,1), 1, "p1", true) -- fifo size can also be 1 (tested in SW)
+  local inp_dxdy = C.fifoLoop( fifos, statements, ITYPE, R.selectStream("i1",inp_broad,1), 1, "p1", true) -- fifo size can also be 1 (tested in SW)
   local dxdy = R.apply("dxdy",RM.makeHandshake(C.index(ITYPE,0,0)), inp_dxdy)
 
 --  if GRAD_INT then
@@ -331,7 +331,7 @@ function sift.siftKernel(dxdyType)
   -- it seems like we shouldn't need a FIFO here, but we do: the changeRate downstream will only be ready every 1/8 cycles.
   -- We need a tiny fifo to hold the reduceseq output, to keep it from stalling. (the scheduling isn't smart enough to know
   -- that reduceSeq only has an output every 16 cycles, so it can't overlap them)
-  local desc = C.fifo(fifos,statements,types.array2d(descTypeRed,8),desc,128,"lol",false) -- fifo size can also be 1 (tested in SW)
+  local desc = C.fifoLoop(fifos,statements,types.array2d(descTypeRed,8),desc,128,"lol",false) -- fifo size can also be 1 (tested in SW)
 
   local desc = R.apply("up",RM.liftHandshake(RM.changeRate(descTypeRed,1,8,1),"CR"),desc)
   local desc = R.apply("upidx",RM.makeHandshake(C.index(types.array2d(descTypeRed,1),0,0)), desc)
@@ -340,10 +340,10 @@ function sift.siftKernel(dxdyType)
   local desc_broad = R.apply("desc_broad", RM.broadcastStream(descTypeRed,2), desc)
 
   local desc0 = R.selectStream("d0",desc_broad,0)
-  local desc0 = C.fifo( fifos, statements, descTypeRed, desc0, 256, "d0")
+  local desc0 = C.fifoLoop( fifos, statements, descTypeRed, desc0, 256, "d0")
 
   local desc1 = R.selectStream("d1",desc_broad,1)
-  local desc1 = C.fifo( fifos, statements, descTypeRed, desc1, 256, "d1")
+  local desc1 = C.fifoLoop( fifos, statements, descTypeRed, desc1, 256, "d1")
 
   local desc_sum = R.apply("sum",RM.liftHandshake(RM.liftDecimate(RM.reduceSeq( RS.modules.sumPow2{inType=RED_TYPE,outType=RED_TYPE},1/(TILES_X*TILES_Y*8)))),desc1)
   local desc_sum = R.apply("sumlift",RM.makeHandshake( sift.fixedLift(RED_TYPE)), desc_sum)
@@ -518,7 +518,7 @@ function sift.siftTop(W,H,T,FILTER_RATE,FILTER_FIFO,X)
   -------------------------------
   -- right branch: make the harris bool
   local right = R.selectStream("d1",dxdyBroad,1)
-  right = C.fifo( fifos, statements, DXDY_PAIR, right, 128, "rightFIFO")
+  right = C.fifoLoop( fifos, statements, DXDY_PAIR, right, 128, "rightFIFO")
 
   local harrisFn, harrisType = harris.makeHarrisKernel(dxdyType,dxdyType)
   local right = R.apply("harris", RM.makeHandshake(harrisFn), right)
@@ -542,7 +542,7 @@ function sift.siftTop(W,H,T,FILTER_RATE,FILTER_FIFO,X)
     --print("GRAD_INT=false")
   end
 
-  left = C.fifo( fifos, statements, DXDY_PAIR, left, 2048/DXDY_PAIR:verilogBits(), "leftFIFO")
+  left = C.fifoLoop( fifos, statements, DXDY_PAIR, left, 2048/DXDY_PAIR:verilogBits(), "leftFIFO")
 
   local left = R.apply("stlbinp", RM.makeHandshake(C.arrayop(DXDY_PAIR,1,1)), left)
   local left = R.apply( "stlb", RM.makeHandshake(C.stencilLinebuffer(DXDY_PAIR, internalW, internalH, 1,-TILES_X*4+1,0,-TILES_Y*4+1,0)), left)
@@ -563,7 +563,7 @@ function sift.siftTop(W,H,T,FILTER_RATE,FILTER_FIFO,X)
   local filterFn = RM.filterSeq(FILTER_TYPE,W,H,{1,FILTER_RATE},FILTER_FIFO)
 
   local out = R.apply("FS",RM.liftHandshake(RM.liftDecimate(filterFn)),out)
-  local out = C.fifo( fifos, statements, FILTER_TYPE, out, FILTER_FIFO, "fsfifo", false)
+  local out = C.fifoLoop( fifos, statements, FILTER_TYPE, out, FILTER_FIFO, "fsfifo", false)
 
   local siftFn, descType = sift.siftKernel(dxdyType)
   local out = R.apply("sft", siftFn, out)

platform/zynq10vivado/compile

@@ -1,4 +1,4 @@
-#!/bin/bash
+#!/bin/bash -x
 
 VERILOG_FILE=$1
 METADATA_FILE=$2
@@ -19,5 +19,6 @@ echo "write_bitstream system.bit" >> system.tcl
 echo "report_timing" >> system.tcl
 echo "report_timing_summary" >> system.tcl
 vivado -mode batch -source 'system.tcl' -nojournal -log 'vivado.log' > /dev/null
-cp system.bit $OUTFILE
+bootgen -image ../../../platform/axi/boot.bif -w -process_bitstream bin
+cp system.bit.bin $OUTFILE
 

src/modules.lua

@@ -2880,7 +2880,7 @@ end
 
 -- function definition
 -- output, inputs
-function modules.lambda( name, input, output, instances, generatorStr, X )
+function modules.lambda( name, input, output, instances, generatorStr, generatorParams, X )
   if DARKROOM_VERBOSE then print("lambda start '"..name.."'") end
 
   err( X==nil, "lambda: too many arguments" )
@@ -2891,12 +2891,13 @@ function modules.lambda( name, input, output, instances, generatorStr, X )
   err( instances==nil or type(instances)=="table", "lambda: instances must be nil or a table")
   if instances~=nil then J.map( instances, function(n) err( rigel.isInstance(n), "lambda: instances argument must be an array of instances" ) end ) end
   err( generatorStr==nil or type(generatorStr)=="string","lambda: generatorStr must be nil or string")
+  err( generatorParams==nil or type(generatorParams)=="table","lambda: generatorParams must be nil or table")
 
   if rigel.SDF then input, output = lambdaSDFNormalize(input,output) end
 
   name = J.verilogSanitize(name)
 
-  local res = {kind = "lambda", name=name, input = input, output = output, instances=instances, generator=generatorStr }
+  local res = {kind = "lambda", name=name, input = input, output = output, instances=instances, generator=generatorStr, params=generatorParams }
 
   if input==nil then
     res.inputType = types.null()

src/rigelSimple.lua

@@ -222,6 +222,10 @@ function RS.modules.filterSeq(t)
   return RM.filterSeq( t.type, t.size[1], t.size[2], rate, t.fifoSize, t.coerce )
 end
 
+function RS.modules.fifo(t)
+  return C.fifo( t.type, t.size )
+end
+
 function RS.connect(t)
   err( R.isFunction(t.toModule), "RigelSimple.connect: toModule must be rigel module")
 
@@ -266,7 +270,7 @@ function RS.selectStream(t)
   return R.selectStream( "v"..tostring(ccnt), t.input, t.index )
 end
 
-function RS.fifo(t)
+function RS.fifoLoop(t)
   local ty = t.input.type
   assert( R.isHandshake(ty))
   ty = R.extractData(ty)
@@ -275,7 +279,7 @@ function RS.fifo(t)
   t.fifoList.statements = t.fifoList.statements or {}
 
   ccnt = ccnt + 1
-  return C.fifo( t.fifoList.fifos, t.fifoList.statements, ty, t.input, t.depth, "v"..tostring(ccnt), false )
+  return C.fifoLoop( t.fifoList.fifos, t.fifoList.statements, ty, t.input, t.depth, "v"..tostring(ccnt), false )
 end
 
 function RS.index(t)