qce50: Update clock vote for improved performance.

Signed-off-by: Ajay Dudani <adudani@codeaurora.org> Signed-off-by: Javier Sayago <admin@lonasdigital.com>
javilonas · May 27, 2015 · 511da83 · 511da83
1 parent 87ca5e3
commit 511da83
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Showing 2 changed files with 5 additions and 5 deletions.
diff --git a/arch/arm/mach-msm/clock-8084.c b/arch/arm/mach-msm/clock-8084.c
@@ -2552,7 +2552,7 @@ static struct local_vote_clk gcc_ce2_clk = {
 	.en_mask = BIT(2),
 	.base = &virt_bases[GCC_BASE],
 	.c = {
-		.parent = &branch_ce2_clk_src.c,
+		.parent = &ce2_clk_src.c,
 		.dbg_name = "gcc_ce2_clk",
 		.ops = &clk_ops_vote,
 		CLK_INIT(gcc_ce2_clk.c),
@@ -5414,7 +5414,7 @@ static DEFINE_CLK_VOTER(branch_ce1_clk_src,  &ce1_clk_src.c,  50000000);
 
 static DEFINE_CLK_VOTER(qseecom_ce2_clk_src, &ce2_clk_src.c, 100000000);
 static DEFINE_CLK_VOTER(qcedev_ce2_clk_src,  &ce2_clk_src.c, 100000000);
-static DEFINE_CLK_VOTER(qcrypto_ce2_clk_src, &ce2_clk_src.c, 100000000);
+static DEFINE_CLK_VOTER(qcrypto_ce2_clk_src, &ce2_clk_src.c, 171430000);
 static DEFINE_CLK_VOTER(branch_ce2_clk_src,  &ce2_clk_src.c,  50000000);
 
 static DEFINE_CLK_MEASURE(l2_m_clk);

diff --git a/drivers/crypto/msm/qce50.c b/drivers/crypto/msm/qce50.c
@@ -5233,12 +5233,12 @@ static int __qce_init_clk(struct qce_device *pce_dev)
 	if (!IS_ERR(ce_core_src_clk)) {
 		pce_dev->ce_core_src_clk = ce_core_src_clk;
 
-		/* Set the core src clk @100Mhz */
-		rc = clk_set_rate(pce_dev->ce_core_src_clk, 100000000);
+		/* Set the core src clk @171Mhz */
+		rc = clk_set_rate(pce_dev->ce_core_src_clk, 171430000);
 		if (rc) {
 			clk_put(pce_dev->ce_core_src_clk);
 			pce_dev->ce_core_src_clk = NULL;
-			pr_err("Unable to set the core src clk @100Mhz.\n");
+			pr_err("Unable to set the core src clk @171Mhz.\n");
 			goto err_clk;
 		}
 	} else {