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implemented new decoder beta
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jonathan committed Aug 30, 2013
1 parent 91433c1 commit 6a3696a
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Showing 5 changed files with 19 additions and 4 deletions.
2 changes: 2 additions & 0 deletions darm.h
Expand Up @@ -90,6 +90,8 @@ typedef struct _darm_t {
// the instruction label
darm_instr_t instr;
darm_enctype_t instr_type;
darm_enctype_t instr_imm_type; // thumb32 immediate type
darm_enctype_t instr_flag_type; // thumb32 flag type

// conditional flags, if any
darm_cond_t cond;
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10 changes: 7 additions & 3 deletions tests/tests_thumb2.c
Expand Up @@ -31,7 +31,7 @@ struct {
{0xF60271AB, 0, "addwal r1, r2, #0xfab", {
.instr = I_ADDW, .I = B_SET, .imm = 0xFAB, .Rd = r1, .Rn = r2, .cond = C_AL}},
{0xF60F71AC, 0, "adral r1 #0xfac", {
.instr = I_ADR, .I = B_SET, .imm = 0xFAC, .Rd = r1, .cond = C_AL}},
.instr = I_ADR, .I = B_SET, .imm = 0xFAC, .Rd = r1, .Rn = PC, .cond = C_AL}},
{0xEB0211D3, 0, "addal.w r1, r2, r3 lsr #7", {
.instr = I_ADD, .I = B_SET, .imm = 7, .Rd = r1, .Rn = r2, .Rm = r3, .shift = 7, .shift_type = S_LSR, .cond = C_AL}},
{0xEB121FD3, 0, "cmnal r2, r3, lsr #7", {
Expand All @@ -40,10 +40,12 @@ struct {
.instr = I_ADD, .I = B_SET, .S = B_SET, .imm = 7, .Rd = r3, .Rn = SP, .Rm = r3, .shift = 7, .shift_type = S_LSR, .cond = C_AL}},
// add is false
{0xF6AF37AD, 0, "adral.w r7 #0xbad", {
.instr = I_ADR, .I = B_SET, .imm = 0xBAD, .Rd = r7, .cond = C_AL}},
.instr = I_ADR, .I = B_SET, .imm = 0xBAD, .Rd = r7, .Rn = PC, .cond = C_AL}},
// add is true
{0xF60F37AD, 0, "adral.w r7 #0xbad", {
.instr = I_ADR, .I = B_SET, .imm = 0xBAD, .Rd = r7, .cond = C_AL}},
.instr = I_ADR, .I = B_SET, .imm = 0xBAD, .Rd = r7, .Rn = PC, .cond = C_AL}},

/* AND */
{0xF41221BC, 0, "andal r1, r2 #0x5e00", {
.instr = I_AND, .I = B_SET, .S = B_SET, .imm = 0x5E000, .Rd = r1, .Rn = r2, .cond = C_AL}},
{0xF4122FBC, 0, "tstal r2 #0x5e00", {
Expand All @@ -56,6 +58,8 @@ struct {
.instr = I_ASR, .I = B_SET, .S = B_SET, .imm = 0x6, .Rd = r1, .Rm = r2, .shift = 6, .shift_type = S_ASR, .cond = C_AL}},
{0xFA42F104, 0, "asral.w r1, r2, r4", {
.instr = I_ASR, .I = B_UNSET, .S = B_UNSET, .Rd = r1, .Rn = r2, .Rm = r4, .cond = C_AL}},

/* Branch */
{0xF43F8801, 0, "beq.w #-266238", {
.instr = I_B, .I = B_SET, .S = B_SET, .imm = 0xFFFBF002, .J1 = B_UNSET, .J2 = B_SET, .cond = C_EQ}},
{0xF30AAFF6, 0, "bgt.w #0xcafec", {
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2 changes: 1 addition & 1 deletion thumb2-decoder.c
Expand Up @@ -245,7 +245,7 @@ darm_instr_t thumb2_data_shifted_reg(darm_t *d, uint16_t w, uint16_t w2) {
static uint8_t op, Rn, Rd_S;
op = (w >> 5) & b1111;
Rn = w & b1111;
Rd_S = ((w2 >> 7) & 0x1E) | (w >> 4);
Rd_S = ((w2 >> 7) & 0x1E) | ((w >> 4) & 1);

// These all operate on registers

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8 changes: 8 additions & 0 deletions thumb2.c
Expand Up @@ -116,6 +116,7 @@ int thumb2_lookup_instr(uint16_t w, uint16_t w2) {
return i;
}
}

return 0;
}

Expand Down Expand Up @@ -659,11 +660,18 @@ static int thumb2_disasm(darm_t *d, uint16_t w, uint16_t w2)
int index;
index = thumb2_lookup_instr(w, w2);
d->instr = thumb2_instr_labels[index];
d->instr_type = thumb2_instr_types[index];
d->instr_imm_type = thumb2_imm_instr_types[index];
d->instr_flag_type = thumb2_flags_instr_types[index];

d->instr = thumb2_decode_instruction(d, w, w2);


thumb2_parse_reg(index, d, w, w2);
thumb2_parse_imm(index, d, w, w2);
thumb2_parse_flag(index, d, w, w2);
thumb2_parse_misc(index, d, w, w2);
d->instr_type = I_INVLD;
return 0;
}

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1 change: 1 addition & 0 deletions thumb2.h
Expand Up @@ -32,5 +32,6 @@ POSSIBILITY OF SUCH DAMAGE.

uint32_t thumb_expand_imm(uint16_t imm12_r);
void thumb2_decode_immshift(darm_t *d, uint8_t type, uint8_t imm5);
darm_instr_t thumb2_decode_instruction(darm_t *d, uint16_t w, uint16_t w2);

#endif

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